NS7520B-1-I46 Digi International, NS7520B-1-I46 Datasheet - Page 45

• Manufacturer Part Number: NS7520B-1-I46
• Description: IC ARM MICROPROCESSOR 177BGA
• Manufacturer: Digi International
• Series: NET+ARM®r

Specifications of NS7520B-1-I46

• Applications: Network Processor
• Core Processor: ARM7
• Program Memory Type: External Program Memory
• Controller Series: -
• Ram Size: External
• Interface: EBI/EMI, Ethernet, DMA, SPI, UART
• Number Of I /o: 16
• Voltage - Supply: 1.4 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 177-LFBGA
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Exception vector table
Not all exceptions can occur at the same time, however.
All exceptions result in the ARM processor vectoring to an address in low memory,
using the exception vector table. The exception vector table always exists and always
starts at base address 0.
Table 17: Exception vector table
’h0
’h4
’h8
’hC
’h10
’h14
’h18
’h1C
Vector
address
Undefined instructions and SWIs are mutually exclusive, as they each
correspond to particular (non-overlapping) decoding of the current
instruction.
If a data abort occurs at the same time as FIRQ and the FIRQ is enabled
(that is, the CPSR F flag is clear), the data abort takes priority. ARM7TDMI
enters the data abort handler and immediately goes to the FIRQ vector. A
normal return from FIRQ causes the data abort handler to resume
execution.
Placing data abort at a higher priority than FIRQ is necessary to ensure
that the transfer error does not escape detection. The time for this
exception entry should be added to worst-case FIRQ latency
calculations.
RESET
Undefined
SWI
Abort (prefetch)
Abort (data)
Reserved
IRQ
FIRQ
Vector
Reset vector; for initialization and startup
Undefined instruction encountered
Software interrupt; used for entry point into the kernel
Bus error (no response or error) fetching instructions
Bus error (no response or error) fetching data
Reserved
Interrupt from ARM7TDMI interrupt controller
Fast interrupt from ARM7TDMI controller
Description
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