NS7520B-1-I46 Digi International, NS7520B-1-I46 Datasheet - Page 62
![no-image](/images/manufacturer_photos/0/1/193/digi_international_sml.jpg)
NS7520B-1-I46
Manufacturer Part Number
NS7520B-1-I46
Description
IC ARM MICROPROCESSOR 177BGA
Manufacturer
Digi International
Series
NET+ARM®r
Specifications of NS7520B-1-I46
Applications
Network Processor
Core Processor
ARM7
Program Memory Type
External Program Memory
Controller Series
-
Ram Size
External
Interface
EBI/EMI, Ethernet, DMA, SPI, UART
Number Of I /o
16
Voltage - Supply
1.4 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
177-LFBGA
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
NS7520B-1-I46
Manufacturer:
Digi International
Quantity:
10 000
Part Number:
NS7520B-1-I46
Manufacturer:
NETARM
Quantity:
20 000
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NS7520 clock module block diagram
External oscillator mode hardware configuration
5 0
U s i n g t h e e x t e r n a l o s c i l l a t o r
Using the external oscillator
This diagram provides an overview of the clock module.
The NS7520 can use an external oscillator to generate the BCLK and FXTAL signals. In
this type of configuration, the BCLK frequency is equal to the oscillator input
frequency. The FXTAL frequency is equal to the oscillator input frequency divided by
five. For example, with a 55MHz oscillator, BCLK would be 55 MHZ and FXTAL would
be 11MHz.
Note:
The external oscillator’s output is connected to the XTALA1 input through a 100
resistor. XTALA2 is an output and is left open.
FXTAL
BCLK
SCANEN
N S 7 5 2 0 H a r d w a r e R e f e r e n c e , R e v G 9 / 2 0 0 7
Using an external oscillator with PLL enabled is not advantageous, due to
the PLL input limitation of 10MHz to 20MHz. The oscillator needs to be the
same frequency as the crystal. Using a clock source greater than 20MHz
would result in the PLL running outside its operating range.
/5
PLLTST
oscillator
External
BISTEN
External
crystal
circuit
PLL
PLL Settings reg
PLL Control reg
A[8:0]
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