PEF 20525 F V1.3 Infineon Technologies, PEF 20525 F V1.3 Datasheet - Page 108

• Manufacturer Part Number: PEF 20525 F V1.3
• Description: IC CTRL PPP/HDLC SERIAL TQFP-100
• Manufacturer: Infineon Technologies

Specifications of PEF 20525 F V1.3

• Function: Serial Optimized Communications Controller
• Interface: ASYNC, BISYNC, HDLC, PPP
• Number Of Circuits: 2
• Voltage - Supply: 3 V ~ 3.6 V
• Current - Supply: 50mA
• Power (watts): 150mW
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 100-LFQFP
• Includes: Bit Processor Functions, Serial Communication Controllers (SCCs)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: PEF20525FV1.3X; PEF20525FV13XP; SP000007592

Table 15
Offset Ch
27
28
29
2A
2B
2C
2D
2E
2F
30
31
32
33
34
35
36
37
38
39
3A
3B
3C
3D
3E
3F
40
41
42
43
Data Sheet
A
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
77
78
79
7A
7B
7C
7D
7E
7F
80
81
82
83
84
85
86
87
88
89
8A
8B
8C
8D
8E
8F
90
91
92
93
B
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
read
Register Overview (cont’d)
PCMRX0
PCMRX1
PCMRX2
PCMRX3
Register
PCMTX0
PCMTX1
PCMTX2
PCMTX3
UDAC3
RTSA0
RTSA1
RTSA2
RTSA3
TTSA0
TTSA1
TTSA2
TTSA3
TIMR0
TIMR1
TIMR2
TIMR3
BRRH
BRRL
XAD1
XAD2
RAH1
RAH2
RAL1
RAL2
write
Res
7E
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
Val
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
User Defined PPP ASYNC Control
Character Map 3
Transmit Time Slot Assignment Register 0 164
Transmit Time Slot Assignment Register 1 164
Transmit Time Slot Assignment Register 2 165
Transmit Time Slot Assignment Register 3 165
Receive Time Slot Assignment Register 0 167
Receive Time Slot Assignment Register 1 167
Receive Time Slot Assignment Register 2 168
Receive Time Slot Assignment Register 3 168
PCM Mask Transmit Direction Register 0
PCM Mask Transmit Direction Register 1
PCM Mask Transmit Direction Register 2
PCM Mask Transmit Direction Register 3
PCM Mask Receive Direction Register 0
PCM Mask Receive Direction Register 1
PCM Mask Receive Direction Register 2
PCM Mask Receive Direction Register 3
Baud Rate Register (Low Byte)
Baud Rate Register (High Byte)
Timer Register 0
Timer Register 1
Timer Register 2
Timer Register 3
Transmit Address 1 Register
Transmit Address 2 Register
Receive Address 1 Low Register
Receive Address 1 High Register
Receive Address 2 Low Register
Receive Address 2 High Register
108
Meaning
Register Description
PEB 20525
PEF 20525
2000-09-14
162
170
170
171
171
173
173
174
174
176
176
178
178
179
179
182
182
184
184
185
185
Page