PEF 20525 F V1.3 Infineon Technologies, PEF 20525 F V1.3 Datasheet - Page 207

• Manufacturer Part Number: PEF 20525 F V1.3
• Description: IC CTRL PPP/HDLC SERIAL TQFP-100
• Manufacturer: Infineon Technologies

Specifications of PEF 20525 F V1.3

• Function: Serial Optimized Communications Controller
• Interface: ASYNC, BISYNC, HDLC, PPP
• Number Of Circuits: 2
• Voltage - Supply: 3 V ~ 3.6 V
• Current - Supply: 50mA
• Power (watts): 150mW
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 100-LFQFP
• Includes: Bit Processor Functions, Serial Communication Controllers (SCCs)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: PEF20525FV1.3X; PEF20525FV13XP; SP000007592

Data Sheet
XBC
(11:0)
XME
XF
XIF
Transmit Byte Count
This register is used in DMA Mode only, to program the length (1…4096
bytes) of the next frame to be transmitted. The length of the block in
number of bytes is:
This allows the SEROCCO-H to request the correct amount of DMA
cycles after an ’XF’ or’ XIF’ command.
Transmit Message End Command
Only valid in external DMA controller mode.
This bit is identical to ’XME’ command bit (refer to register
Page
Transmit Frame Command
Only valid in external DMA controller mode.
This bit is identical to ’XF’ command bit (refer to register
Page
Transmit I-Frame Command
Only valid in external DMA controller mode.
This bit is identical to ’XIF’ command bit (refer to register
Page
135).
135).
135).
Length
5-207
=
XBC
Register Description (XBCH)
+
1
“CMDRL” on
“CMDRL” on
“CMDRL” on
PEB 20525
PEF 20525
2000-09-14