PEF 20525 F V1.3 Infineon Technologies, PEF 20525 F V1.3 Datasheet - Page 163

• Manufacturer Part Number: PEF 20525 F V1.3
• Description: IC CTRL PPP/HDLC SERIAL TQFP-100
• Manufacturer: Infineon Technologies

Specifications of PEF 20525 F V1.3

• Function: Serial Optimized Communications Controller
• Interface: ASYNC, BISYNC, HDLC, PPP
• Number Of Circuits: 2
• Voltage - Supply: 3 V ~ 3.6 V
• Current - Supply: 50mA
• Power (watts): 150mW
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 100-LFQFP
• Includes: Bit Processor Functions, Serial Communication Controllers (SCCs)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: PEF20525FV1.3X; PEF20525FV13XP; SP000007592

PEB 20525
PEF 20525
Register Description (UDAC3)
AC3..0
User Defined ASYNC Character Control Map
This bit field is valid in HDLC octet-synchronous PPP mode only:
These bit fields define user determined characters as control characters
which have to be mapped into the transmit data stream.
In register ACCM only characters 00
..1F
can be selected as control
H
H
characters. Register UDAC allows to specify any four characters in the
range 00
..FF
.
H
H
The default value is a 7E
flag which must be always mapped. Thus no
H
additional character is mapped if 7E
’s are programed to bit fields
H
AC3...0 (reset value).
(7E
is mapped automatically, even if not defined via a AC bit field.)
H
Data Sheet
5-163
2000-09-14