PEF 20525 F V1.3 Infineon Technologies, PEF 20525 F V1.3 Datasheet - Page 92

• Manufacturer Part Number: PEF 20525 F V1.3
• Description: IC CTRL PPP/HDLC SERIAL TQFP-100
• Manufacturer: Infineon Technologies

Specifications of PEF 20525 F V1.3

• Function: Serial Optimized Communications Controller
• Interface: ASYNC, BISYNC, HDLC, PPP
• Number Of Circuits: 2
• Voltage - Supply: 3 V ~ 3.6 V
• Current - Supply: 50mA
• Power (watts): 150mW
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 100-LFQFP
• Includes: Bit Processor Functions, Serial Communication Controllers (SCCs)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: PEF20525FV1.3X; PEF20525FV13XP; SP000007592

Additionally an optional ’FLEX’ interrupt is generated prior to ’RME’, indicating that the
maximum receive frame length was exceeded.
Receive operation continues with the beginning of the next receive frame.
4.2
PPP (as described in RFC1662) can work over 3 modes: asynchronous HDLC,
synchronous HDLC, and octet synchronous. The SEROCCO-H supports bit and octet
synchronous HDLC PPP for use over dial-up connections. The octet synchronous mode
of PPP protocol (RFC 1662) supports PPP over SONET applications.
The synchronous HDLC PPP modes are submodes of the HDLC mode. The appropriate
PPP mode is selected via bit field ’PPPM’ in register CCR2L.
The PPP-support hardware allows software to perform segmentation and reassembly of
PPP payloads, and allows SEROCCO-H to perform the synchronous HDLC PPP
protocol conversions as required for the network interface.
4.2.1
The SEROCCO-H transmits a data block, inserts HDLC Header (Opening Flag), and
appends the HDLC Trailer (CRC, Ending Flag). Zero-bit stuffing algorithm is also
performed. No character mapping is performed. The bit-synchronous PPP mode differs
from the HDLC mode (address mode 0) only in the abort sequence:
HDLC requires at least 7 consecutive ’1’ bits as abort sequence, whereas PPP requires
at least 15 ’1’ bits.
For receive operation SEROCCO-H monitors the incoming data stream for the Opening
Flag (7E Hex) to identify the beginning of a HDLC packet. Subsequent bytes are part of
data and are processed as normal HDLC packet including checking of CRC.
4.2.2
The SEROCCO-H transmits a data block, inserts HDLC Header (Opening Flag), and
appends the HDLC Trailer (CRC, Ending Flag). Beside this standard HDLC operation,
zero-bit stuffing is not performed, but character mapping is performed.
For receive operation SEROCCO-H monitors the incoming data stream for the Opening
Flag (7E Hex) to identify the beginning of a HDLC packet. Subsequent bytes are part of
data and are processed as normal HDLC packet including checking of CRC. Received
mapped characters are unmapped.
The abort sequence consists of the control escape character 7D
character 7E
be programmed to 7E
Octet alignment is provided through the synchronization pulses in clock mode 5b.
Data Sheet
Point-to-Point Protocol (PPP) Modes
Bit Synchronous PPP
Octet Synchronous PPP
H
(not stuffed). Between two frames, the interframe time fill character should
H
by setting bit CCR2H:ITF to ’1’.
92
Detailed Protocol Description
H
followed by a flag
PEB 20525
PEF 20525
2000-09-14