PEF 20525 F V1.3 Infineon Technologies, PEF 20525 F V1.3 Datasheet - Page 87

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PEF 20525 F V1.3

Manufacturer Part Number
PEF 20525 F V1.3
Description
IC CTRL PPP/HDLC SERIAL TQFP-100
Manufacturer
Infineon Technologies
Datasheet

Specifications of PEF 20525 F V1.3

Function
Serial Optimized Communications Controller
Interface
ASYNC, BISYNC, HDLC, PPP
Number Of Circuits
2
Voltage - Supply
3 V ~ 3.6 V
Current - Supply
50mA
Power (watts)
150mW
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
100-LFQFP
Includes
Bit Processor Functions, Serial Communication Controllers (SCCs)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
PEF20525FV1.3X
PEF20525FV13XP
SP000007592
Figure 42
Figure 43
Figure 44
option 1)
The address field (8 bit address, 16 bit address or the high byte of a 16 bit address) can
optionally be forwarded to the RFIFO (bit 'RADD' in register CCR3H)
option 2)
The 16 bit or 32 bit CRC field can optionally be forwarded to the RFIFO (bit 'RCRC' in
register CCR3H)
Data Sheet
to RFIFO
to RFIFO
to RFIFO
registers
registers
involved
registers
involved
involved
HDLC Receive Data Processing in Address Mode 2 (8 bit)
HDLC Receive Data Processing in Address Mode 1
HDLC Receive Data Processing in Address Mode 0
FLAG
FLAG
FLAG
compare)
compare)
(address
(address
RAH1,2
ADDR
opt. 1)
RAL1,2
ADDR
opt. 1)
16 bit ADDR
(low)
8 bit
8 bit
data
data
data
CRC16
87
option 2)
CRC16
CRC16
/32
option 2)
option 2)
Detailed Protocol Description
/32
/32
FLAG
RSTA
RSTA
RSTA
RSTA
FLAG
RSTA
RSTA
FLAG
PEB 20525
PEF 20525
2000-09-14

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