PEF 20525 F V1.3 Infineon Technologies, PEF 20525 F V1.3 Datasheet - Page 141

• Manufacturer Part Number: PEF 20525 F V1.3
• Description: IC CTRL PPP/HDLC SERIAL TQFP-100
• Manufacturer: Infineon Technologies

Specifications of PEF 20525 F V1.3

• Function: Serial Optimized Communications Controller
• Interface: ASYNC, BISYNC, HDLC, PPP
• Number Of Circuits: 2
• Voltage - Supply: 3 V ~ 3.6 V
• Current - Supply: 50mA
• Power (watts): 150mW
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 100-LFQFP
• Includes: Bit Processor Functions, Serial Communication Controllers (SCCs)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: PEF20525FV1.3X; PEF20525FV13XP; SP000007592

Data Sheet
CM(2:0)
PU
SC(2:0)
Clock Mode
This bit field selects one of main clock modes 0..7. For a detailed
description of the clock modes refer to
CM = ’000’
CM = ’001’
CM = ’010’
CM = ’011’
CM = ’100’
CM = ’101’
CM = ’110’
CM = ’111’
Power Up
PU=’0’
PU=’1’
Serial Port Configuration
clock mode 0
clock mode 1
clock mode 2
clock mode 3
clock mode 4
clock mode 5 (time-slot oriented clocking modes)
clock mode 6
clock mode 7
The SCC is in ’power-down’ mode. The protocol engines
are switched off (standby) and no operation is performed.
This may be used to save power when SCC is not in use.
Note: The SCC transmit FIFO accepts transmit data even
The SCC is in ’power-up’ mode.
in ’power-down’ mode.
5-141
Chapter 3.2.3
Register Description (CCR0H)
PEB 20525
PEF 20525
2000-09-14