PEF 20525 F V1.3 Infineon Technologies, PEF 20525 F V1.3 Datasheet - Page 130

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PEF 20525 F V1.3

Manufacturer Part Number
PEF 20525 F V1.3
Description
IC CTRL PPP/HDLC SERIAL TQFP-100
Manufacturer
Infineon Technologies
Datasheet

Specifications of PEF 20525 F V1.3

Function
Serial Optimized Communications Controller
Interface
ASYNC, BISYNC, HDLC, PPP
Number Of Circuits
2
Voltage - Supply
3 V ~ 3.6 V
Current - Supply
50mA
Power (watts)
150mW
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
100-LFQFP
Includes
Bit Processor Functions, Serial Communication Controllers (SCCs)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
PEF20525FV1.3X
PEF20525FV13XP
SP000007592
PEB 20525
PEF 20525
Register Description (FIFOH)
XTF command. The address provided during an XFIFO write access is not incremental;
it is always 10
for channel A or 60
for channel B.
H
H
• DMA Controlled Data Transfer (GMODE.EDMA=’1’)
If DMA operation is enabled, the SEROCCO-H autonomously requests data transfer to
the XFIFO by asserting the DRT line to the external DMA controller. The DRT line
remains active until the beginning of the last transmit data byte/word transfer. For a
detailed description of the external DMA interface operation refer to
“External DMA
Controller Support” on Page
80.
Data Sheet
5-130
2000-09-14

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