PEF 20525 F V1.3 Infineon Technologies, PEF 20525 F V1.3 Datasheet - Page 149

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PEF 20525 F V1.3

Manufacturer Part Number
PEF 20525 F V1.3
Description
IC CTRL PPP/HDLC SERIAL TQFP-100
Manufacturer
Infineon Technologies
Datasheet

Specifications of PEF 20525 F V1.3

Function
Serial Optimized Communications Controller
Interface
ASYNC, BISYNC, HDLC, PPP
Number Of Circuits
2
Voltage - Supply
3 V ~ 3.6 V
Current - Supply
50mA
Power (watts)
150mW
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
100-LFQFP
Includes
Bit Processor Functions, Serial Communication Controllers (SCCs)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
PEF20525FV1.3X
PEF20525FV13XP
SP000007592
Data Sheet
MDS(1:0)
ADM
NRM
Mode Select
This bit field selects the HDLC protocol sub-mode including the
’extended transparent mode’.
MDS = ’00’
MDS = ’01’
MDS = ’10’
MDS = ’11’
Note: ’MDS(1:0)’ must be set to ’10’ if any PPP mode is enabled via bit
Address Mode Select
The meaning of this bit depends on the selected protocol sub-mode:
Automode, Address Mode 2:
Determines the address field length of an HDLC frame.
ADM = ’0’
ADM = ’1’
Address Mode 0/1:
Determines whether address mode 0 or 1 is selected.
ADM = ’0’
ADM = ’1’
Extended Transparent Mode:
ADM = ’1’
Normal Response Mode
This bit is valid in HDLC Automode operation only and determines the
function of the Automode LAP-Controller:
NRM = ’0’
NRM = ’1’
field ’PPPM’ or if SS7 is enabled via bit ’ESS7’ in register CCR3L.
Automode.
Address Mode 2.
Address Mode 0/1.
(Option ’0’ or ’1’ is selected via bit ’ADM’.)
Extended transparent mode (bit transparent transmission/
reception).
8-bit address field.
16-bit address field.
Address Mode 0 (no address recognition).
Address Mode 1 (high byte address recognition).
recommended setting
Full-duplex LAP-B / LAP-D operation.
Half-duplex normal response mode (NRM) operation.
5-149
Register Description (CCR2H)
PEB 20525
PEF 20525
2000-09-14

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