PEF 20525 F V1.3 Infineon Technologies, PEF 20525 F V1.3 Datasheet - Page 230

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PEF 20525 F V1.3

Manufacturer Part Number
PEF 20525 F V1.3
Description
IC CTRL PPP/HDLC SERIAL TQFP-100
Manufacturer
Infineon Technologies
Datasheet

Specifications of PEF 20525 F V1.3

Function
Serial Optimized Communications Controller
Interface
ASYNC, BISYNC, HDLC, PPP
Number Of Circuits
2
Voltage - Supply
3 V ~ 3.6 V
Current - Supply
50mA
Power (watts)
150mW
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
100-LFQFP
Includes
Bit Processor Functions, Serial Communication Controllers (SCCs)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
PEF20525FV1.3X
PEF20525FV13XP
SP000007592
7.7
7.7.1
7.7.1.1
Figure 61
Table 21
No. Parameter
1
2
3
1)
Data Sheet
A clock supply is needed for read access to the on-chip interrupt status registers (ISR, DISR) and for general
purpose port (GPP) operation.
CLK clock period
CLK frequency
CLK high time
CLK low time
CLK
Timing Diagrams
Microprocessor Interface Timing
Microprocessor Interface Clock Timing
Microprocessor Interface Clock Timing
Microprocessor Interface Clock Timing
2
230
1
min.
30
0
11
11
3
Electrical Characteristics
Limit Values
max.
¥
33
¥
¥

PEB 20525
PEF 20525
2000-09-14
Unit
ns
ns
ns
MHz

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