PEF 20525 F V1.3 Infineon Technologies, PEF 20525 F V1.3 Datasheet - Page 157

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PEF 20525 F V1.3

Manufacturer Part Number
PEF 20525 F V1.3
Description
IC CTRL PPP/HDLC SERIAL TQFP-100
Manufacturer
Infineon Technologies
Datasheet

Specifications of PEF 20525 F V1.3

Function
Serial Optimized Communications Controller
Interface
ASYNC, BISYNC, HDLC, PPP
Number Of Circuits
2
Voltage - Supply
3 V ~ 3.6 V
Current - Supply
50mA
Power (watts)
150mW
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
100-LFQFP
Includes
Bit Processor Functions, Serial Communication Controllers (SCCs)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
PEF20525FV1.3X
PEF20525FV13XP
SP000007592
Data Sheet
Register 29
CPU Accessibility:
Reset Value:
Offset Address:
typical usage:
PRE(7:0)
Bit
7
Preamble
This bit field determines the preamble pattern which is send out during
preamble transmission.
Note: In HDLC-mode, zero-bit insertion is disabled during preamble
PREAMB
Preamble Register
6
transmission.
read/write
00
Channel A
1E
written by CPU;
read and evaluated by SEROCCO-H
H
H
5
Channel B
6E
H
Preamble Pattern
5-157
4
PRE(7:0)
3
Register Description (PREAMB)
2
1
PEB 20525
PEF 20525
2000-09-14
0

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