PEF 20525 F V1.3 Infineon Technologies, PEF 20525 F V1.3 Datasheet - Page 38

no-image

PEF 20525 F V1.3

Manufacturer Part Number
PEF 20525 F V1.3
Description
IC CTRL PPP/HDLC SERIAL TQFP-100
Manufacturer
Infineon Technologies
Datasheet

Specifications of PEF 20525 F V1.3

Function
Serial Optimized Communications Controller
Interface
ASYNC, BISYNC, HDLC, PPP
Number Of Circuits
2
Voltage - Supply
3 V ~ 3.6 V
Current - Supply
50mA
Power (watts)
150mW
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
100-LFQFP
Includes
Bit Processor Functions, Serial Communication Controllers (SCCs)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
PEF20525FV1.3X
PEF20525FV13XP
SP000007592
Table 3
Pin No.
P-
LFBGA-
80-2
F4
E1
A4
B4
B3
A6
C1
D4
Data Sheet
P-TQFP-
100-3
14
12
96
94
97
90
5
95
Serial Port Pins (cont’d)
Symbol In (I)
TxDA
RxDA
TxCLK
B
RxCLK
B
CDB
FSCB
RCGB
OSRB
RTSB
CTSB
CxDB
TCGB
OSTB
TxDB
Out (O)
O
o/d
I
I/O
I
I
I
I
I
O
I
I
I
I
O
o/d
Function
Transmit Data Channel A
Transmit data is shifted out via this pin. It can be
configured as push/pull or open drain output
characteristic via bit ’ODS’ in register CCR1L.
Receive Data Channel A
Serial data is received on this pin.
Transmit Clock Channel B
(corresponding to channel A)
Receive Clock Channel B
(corresponding to channel A)
Carrier Detect Channel B
Frame Sync Clock Channel B (cm 5a)
Receive Clock Gating Channel B (cm 4)
Octet Sync Receive Channel B (cm 5b)
(corresponding to channel A)
Request to Send Channel B
(corresponding to channel A)
Clear to Send Channel B
Collision Data Channel B
Transmit Clock Gating Channel B (cm 4)
Octet Sync Transmit Channel B (cm 5b)
(corresponding to channel A)
Transmit Data Channel B
(corresponding to channel A)
38
Pin Descriptions
PEB 20525
PEF 20525
2000-09-14

Related parts for PEF 20525 F V1.3