peb20534 Infineon Technologies Corporation, peb20534 Datasheet - Page 137

• Manufacturer Part Number: peb20534
• Description: Dma Supported Serial Communication Controller With 4 Channels
• Manufacturer: Infineon Technologies Corporation

7.4
The DSCC4 includes an internal Oscillator (OSC) as well as four independent Baud Rate
Generators (BRG) and four Digital Phase Locked Loop (DPLL) circuits.
The transmit and receive clock can be generated either
• externally, and supplied directly via the RxCLK and/or TxCLK pins
• internally, by selecting
There are a total of 13 different clocking modes programmable via bit field ’cm’ in register
CCR0, providing a wide variety of clock generation and clock pin functions, as shown in
Table
The transmit clock pins (TxCLK) may also be configured as output clock and control
signals in certain clock modes if enabled via bit ’TOE’ in register CCR0.
The clocking source for the DPLL’s is always the internal channel specific BRG; the
scaling factor (divider) of the BRG can be programmed through BRR register.
There are two channel specific internal operational clocks in the SCC:
One operational clock (= transmit clock) for the transmitter part and one operational clock
(= receive clock) for the receiver part of the protocol logic.
Note: The internal timers always run using the internal transmit clock.
Table 20
Type
Receive
Clock
Transmit
Clock
Data Sheet
(called external clock modes)
– the internal oscillator (OSC) and/or the channel specific baud rate generator (BRG)
– the internal DPLL, recovering the receive (and optionally transmit) clock from the
(called internal clock modes)
receive data stream.
20.
Clocking System
Overview of Clock Modes
Source
RxCLK Pins
OSC,
DPLL,
BRG,
TxCLK Pins,
RxCLK Pins
OSC,
DPLL,
BRG/BCR,
BRG
Serial Communication Controller (SCC) Cores
Clock
137
Generation
Externally
Internally
Externally
Internally
Clock Mode
0, 1, 4, 5
2, 3a, 6, 7a
3b, 7b
0a, 2a, 4, 6a
1,5
3a, 7a
2b, 6b
0b, 3b, 7b
PEB 20534
PEF 20534
2000-05-30