peb20534 Infineon Technologies Corporation, peb20534 Datasheet - Page 234

• Manufacturer Part Number: peb20534
• Description: Dma Supported Serial Communication Controller With 4 Channels
• Manufacturer: Infineon Technologies Corporation

Data Sheet
CFGIQ
SCC3TX
CFGIQ
SCC2TX
CFGIQ
SCC1TX
CFGIQ
SCC0TX
CFGIQCFG Configure Interrupt Queue Configuration
Configure Interrupt Queue SCC3 Transmit
Configure Interrupt Queue SCC2 Transmit
Configure Interrupt Queue SCC1 Transmit
Configure Interrupt Queue SCC0 Transmit
Only valid, if action request bit ’AR’ is set.
The DSCC4 DMA (interrupt) controller will transfer interrupt vectors
generated by the dedicated SCC transmitter (3..0) to the corresponding
interrupt queue which must be configured via ’CFGIQSCCiTX’ command
bits:
bit=’0’
bit=’1’
Only valid, if action request bit ’AR’ is set.
The DSCC4 DMA (interrupt) controller will transfer action request
acknowledge/failure interrupt vectors to the configuration interrupt
queue which must be configured via ’CFGIQCFG’ command bits:
bit=’0’
bit=’1’
The DSCC4 DMA (interrupt) controller does NOT
configure/re-configure the corresponding interrupt queue,
if action request bit ’AR’ is set to ’1’.
Causes the DSCC4 DMA (interrupt) controller to configure
the corresponding interrupt queue, if action request bit
’AR’ is set to ’1’.
On action request, the DMA (interrupt) controller will
evaluate the corresponding interrupt queue base address
and length registers which must have been programmed
by software before.
The DSCC4 DMA (interrupt) controller does NOT
configure/re-configure the configuration interrupt queue, if
action request bit ’AR’ is set to ’1’.
Causes the DSCC4 DMA (interrupt) controller to configure
the configuration interrupt queue, if action request bit ’AR’
is set to ’1’.
On action request, the DMA (interrupt) controller will
evaluate the configuration interrupt queue base address
and length registers which must have been programmed
by software before.
234
Detailed Register Description
(Channel TX 3)
(Channel TX 2)
(Channel TX 1)
(Channel TX 0)
PEB 20534
PEF 20534
2000-05-30
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