peb20534 Infineon Technologies Corporation, peb20534 Datasheet - Page 323

• Manufacturer Part Number: peb20534
• Description: Dma Supported Serial Communication Controller With 4 Channels
• Manufacturer: Infineon Technologies Corporation

Table 78
CPU Accessibility:
Reset Value:
Offset Address:
typical usage:
Data Sheet
Bit 31
Bit 15
H
A
B
H
A
B
0
0
0
0
0
30
14
0
0
0
0
0
or XAD2 (RESPONSE)
Transmit Address (low)
XADR: Transmit Address Register
29
13
0
0
0
0
0
XAD2 (low byte)
28
12
0
0
0
0
0
read/write
0000 0000
SCC0
0134
written by CPU, valid in HDLC mode only
evaluated by DSCC4
27
11
H
0
0
0
0
0
26
10
0
0
0
0
0
H
SCC1
01B4
25
0
0
0
9
0
0
H
(unused)
24
323
0
0
0
8
0
0
23
7
0
0
0
0
0
SCC2
0234
22
6
0
0
0
0
0
XAD1 (high byte)
H
Transmit Address (high)
Detailed Register Description
or XAD1 (COMMAND)
21
5
0
0
0
0
0
20
4
0
0
0
0
0
SCC3
02B4
19
3
0
0
0
0
0
H
18
2
0
0
0
0
0
PEB 20534
PEF 20534
2000-05-30
17
1
0
0
0
0
0
0
XAD
1_0
16
0
0
0
0
0
0