peb20534 Infineon Technologies Corporation, peb20534 Datasheet - Page 179

• Manufacturer Part Number: peb20534
• Description: Dma Supported Serial Communication Controller With 4 Channels
• Manufacturer: Infineon Technologies Corporation

PEB 20534
PEF 20534
Detailed Protocol Description
Transmission of Frames:
The SCC autonomously transmits S commands and S responses in the auto mode.
Either transparent or I-frames can be transmitted by the user. The software timer has to
be operated in the internal timer mode to transmit I-frames. After the frame has been
transmitted, the timer is self-started, the XFIFO is inhibited, and the SCC waits for the
arrival of a positive acknowledgement. This acknowledgement can be provided by
means of an S- or I-frame.
t
If no positive acknowledgement is received during time
, the SCC transmits an S-
1
command (p = ‘1’), which must be answered by an S-response (f = ‘1’). If the S-response
is not received, the process is performed n1 times (in HDLC known as N2, refer to
register TIMR).
Upon the arrival of an acknowledgement or after the completion of this poll procedure
the XFIFO is enabled and an interrupt is generated. Interrupts may be triggered by the
following:
• message has been positively acknowledged (ALLS interrupt)
• message must be repeated (XMR interrupt)
• response has not been received (TIN interrupt).
In automode only when the ALLS interrupt has been issued data of a new frame
may be provided to the DMA controller!
Upon arrival of an RNR frame, the software timer is started and the status of the remote
t
station is polled periodically after expiration of
, until the status ‘receive ready’ has been
1
detected. The user is informed via the appropriate interrupt. If no response is received
t
after n1 times, a TIN interrupt, and
clock periods thereafter an ALLS interrupt is
1
generated and the process is terminated.
Note: The internal timer mode should only be used in the auto mode.
Transparent frames can be transmitted in all operating modes.
Data Sheet
179
2000-05-30