peb20534 Infineon Technologies Corporation, peb20534 Datasheet - Page 384

• Manufacturer Part Number: peb20534
• Description: Dma Supported Serial Communication Controller With 4 Channels
• Manufacturer: Infineon Technologies Corporation

VFR…
RDO…
CRC…
RAB…
Data Sheet
Valid Frame
Determines whether a valid frame has been received.
1…valid
0…invalid
An invalid frame is either a frame which is not an integer number of 8 bits
(n * 8 bits) in length (e.g. 25 bits), or a frame which is too short taking into
account the operation mode selected via CCR1 (MDS1, MDS0, ADM)
and the selected CRC algorithm (CCR1:C32) as follows:
for CCR2:DRCRC = ’0’: (CCR2:RCRC has no affect)
• auto-/non-auto mode (16-bit address)
• auto-/non-auto mode (8-bit address)
• transparent mode 1:
• transparent mode 0:
Shorter frames are not reported anyway.
for CCR2:DRCRC = ’1’: (CCR2:RCRC has no affect)
• auto-/non-auto mode (16-bit address):
• auto-/non-auto mode (8-bit address):
• transparent mode 1:
• transparent mode 0:
Shorter frames are not reported anyway.
Receive Data Overflow
A data overflow has occurred during reception of the frame. Additionally,
an interrupt can be generated (refer to ISR:RDO/IMR:RDO).
CRC Compare/Check
0…CRC check failed, received frame contains errors.
1…CRC check OK, received frame is error-free.
Receive Message Aborted
The received frame was aborted from the transmitting station. According
to the HDLC protocol, this frame must be discarded by the receiver
station.
4 bytes (CRC-CCITT) or 6 (CRC-32)
3 bytes (CRC-CCITT) or 5 (CRC-32)
3 bytes (CRC-CCITT) or 5 (CRC-32)
2 bytes (CRC-CCITT) or 4 (CRC-32)
2 bytes
1 byte
1 byte
1 byte
384
Host Memory Organization
PEB 20534
PEF 20534
2000-05-30