peb20534 Infineon Technologies Corporation, peb20534 Datasheet - Page 95

• Manufacturer Part Number: peb20534
• Description: Dma Supported Serial Communication Controller With 4 Channels
• Manufacturer: Infineon Technologies Corporation

5.2.6
The DSCC4 operates per default as a little endian device. To support integration into big
endian environments the DMAC provides an internal byte swapping mechanism which
can be enabled via bit ’ENDIAN’ in register GMODE.
The big endian byte swapping applies only to the DATA sections of the receive and
transmit descriptor lists in the shared memory.
Data sections might be prepared/evaluated by software using byte pointer operations in
the shared memory. The DSCC4 will access these data sections by DWORD read/write
transfers. In case of a big endian CPU but little endian DSCC4 mode this will result in
wrong byte orders on the serial line and in the receive data sections.
Bad/Good case example:
Figure 22
All other memory structures (descriptors, interrupt vectors) as well as DSCC4 registers
are organized DWORD-wise and should be operated by software using 32bit operations
only. Therefore no little/big endian ordering mismatches can occur on these structures.
However byte ordering in the local memory, as it appears to the PCI bus view, depends
on the local bus (CPU, memory, PCI bridge) realization.
Data Sheet
...
BYTE *txdatabuffer;
txdatabuffer = 0x10001000;
...
for (i=0; i<9, i++)
{
}
...
*txdatabuffer = (BYTE) i;
txdatabuffer++;
(big endian)
CPU
Little / Big Endian Byte Swap Convention
Little/Big Endian Byte Swapping
MSB
31
0x00
0x04
0x08
0xXX 0xXX 0xXX
0x01
0x05
0x02
0x06
RAM
0x03
0x07
LSB
0
95
Address:
...
0x10001000
0x10001004
0x10001008
...
DMA Controller and Central FIFOs
(little endian mode:
GMODE.ENDIAN = '0')
FLAG
FLAG
0xXX
0x03
0x02
0x01
0x00
0x07
0x06
0x05
0x04
CRC
CRC
DSCC4
(big endian mode:
GMODE.ENDIAN = '1')
serial transmit line,
HDLC mode assumed
time
FLAG
FLAG
0x00
0x04
0x05
0x06
0x07
0x01
0x02
0x03
0x08
CRC
CRC
PEB 20534
PEF 20534
2000-05-30