peb20534 Infineon Technologies Corporation, peb20534 Datasheet - Page 371

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peb20534

Manufacturer Part Number
peb20534
Description
Dma Supported Serial Communication Controller With 4 Channels
Manufacturer
Infineon Technologies Corporation
Datasheet

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Data Sheet
GPDATA
(15:0)
GPP I/O Data Control
Each bit of this bit field is related to the corresponding GPP signal pin.
The function of each bit depends on the I/O configuration of the
dedicated GPP pin:
Output pins (GPDIR(i)=’1’ in register GPDIR):
Write access:
GPDATA(i)
=’0’
GPDATA(i)
=’1’
Read access:
GPDATA(i)
=’0’
GPDATA(i)
=’1’
Input pins (GPDIR(i)=’0’ in register GPDIR):
Write access:
Write access to GPDATA bit locations related to input signals is ignored.
Read access:
GPDATA(i)
=’0’
GPDATA(i)
=’1’
Pin GPi output pin is set to ’0’ (low).
Pin GPi output pin is set to ’1’ (high).
Current level of GPi output pin is ’0’ (low).
Current level of GPi output pin is ’1’ (high).
Current level of GPi input pin is ’0’ (low).
Current level of GPi input pin is ’1’ (high).
371
Detailed Register Description
PEB 20534
PEF 20534
2000-05-30
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