peb20534 Infineon Technologies Corporation, peb20534 Datasheet - Page 170

• Manufacturer Part Number: peb20534
• Description: Dma Supported Serial Communication Controller With 4 Channels
• Manufacturer: Infineon Technologies Corporation

8.1.1.1
Characteristics: Window size 1, random message length, address recognition.
The SCC processes autonomously all numbered frames (S-, I-frames) of an HDLC
protocol. The HDLC control field, I-field data of the frames and an additional status byte
are temporarily stored in the SCC receive FIFO.
Depending on the selected address mode, the SCC can perform a 2-byte or 1-byte
address recognition. If a 2-byte address field is selected, the high address byte is
compared with the fixed value FE
two individually programmable values in RAH1 and RAH2 registers. According to the
ISDN LAPD protocol, bit 1 of the high byte address will be interpreted as COMMAND/
RESPONSE bit (C/R), dependent on the setting of the CRI bit in RAH1, and will be
excluded from the address comparison.
Similarly, two comparison values can be programmed in special registers (RAL1, RAL2)
for the low address byte. A valid address will be recognized in case the high and low byte
of the address field correspond to one of the compare values. Thus, the SCC can be
called (addressed) with 6 different address combinations, however, only the logical
connection identified through the address combination RAH1, RAL1 will be processed in
the auto-mode, all others in the non auto-mode. HDLC frames with address fields that
do not match any of the address combinations, are ignored by the SCC.
In the case of a 1-byte address, RAL1 and RAL2 will be used as comparison values in
the RADR register. According to the X.25 LAPB protocol, the value in RAL1 will be
interpreted as COMMAND and the value in RAL2 as RESPONSE.
The address bytes can be masked to allow selective broadcast frame recognition. For
further information see
8.1.1.2
Characteristics: address recognition, arbitrary window size.
All frames with valid addresses (address recognition identical to auto-mode) are
forwarded directly to the system memory.
The HDLC control field, I-field data and an additional status byte are temporarily stored
in the SCC receive FIFO.
In non-auto-mode, all frames with a valid address are treated similarly.
The address bytes can be masked to allow selective broadcast frame recognition.
Data Sheet
Auto Mode
Non Auto Mode
“Receive Address Handling” on Page
H
or FC
170
H
(group address) as well as with
Detailed Protocol Description
185.
PEB 20534
PEF 20534
2000-05-30