peb20534 Infineon Technologies Corporation, peb20534 Datasheet - Page 233

• Manufacturer Part Number: peb20534
• Description: Dma Supported Serial Communication Controller With 4 Channels
• Manufacturer: Infineon Technologies Corporation

Data Sheet
CFGIQ
SCC3RX
CFGIQ
SCC2RX
CFGIQ
SCC1RX
CFGIQ
SCC0RX
Configure Interrupt Queue SCC3 Receive
Configure Interrupt Queue SCC2 Receive
Configure Interrupt Queue SCC1 Receive
Configure Interrupt Queue SCC0 Receive
Only valid, if action request bit ’AR’ is set.
The DSCC4 DMA (interrupt) controller will transfer interrupt vectors
generated by the dedicated SCC receiver (3..0) to the corresponding
interrupt queue which must be configured via ’CFGIQSCCiRX’
command bits:
bit=’0’
bit=’1’
The DSCC4 DMA (interrupt) controller does NOT
configure/re-configure the corresponding interrupt queue,
if action request bit ’AR’ is set to ’1’.
Causes the DSCC4 DMA (interrupt) controller to
configure/re-configure the corresponding interrupt queue,
if action request bit ’AR’ is set to ’1’.
On action request, the DMA (interrupt) controller will
evaluate the corresponding interrupt queue base address
and length registers which must have been programmed
by software before.
233
Detailed Register Description
(Channel RX 3)
(Channel RX 2)
(Channel RX 1)
(Channel RX 0)
PEB 20534
PEF 20534
2000-05-30