peb20534 Infineon Technologies Corporation, peb20534 Datasheet - Page 185

• Manufacturer Part Number: peb20534
• Description: Dma Supported Serial Communication Controller With 4 Channels
• Manufacturer: Infineon Technologies Corporation

8.1.9
8.1.9.1
When programmed in the extended transparent mode via the MODE register
(MODE:MDS1, MDS0, ADM = ‘111’), the SCC performs fully transparent data
transmission and reception without HDLC framing, i.e. without
• FLAG insertion and deletion
• CRC generation and checking
• bit stuffing.
This feature can be profitably used e.g. for:
• user specific protocol variations
• line state monitoring, or
• test purposes, in particular for monitoring or intentionally generating HDLC protocol
Character or octet boundary synchronization can be achieved by using clock mode 1
with an external receive strobe input to pin CD.
8.1.9.2
The Receive Address Low/High Bytes (RAL1/RAH1 and RAL2/RAH2) in register RADR
can be masked on a per bit basis by setting the corresponding bits in the mask register
RAMR. This allows extended broadcast address recognition. Masked bit positions
always match in comparison of the received frame address with the respective address
fields in register RADR.
This feature is applicable to all HDLC protocol modes with address recognition (auto
mode, non-auto mode and address mode 1). It is disabled if all bits of mask bit fields AML
and AMH are set to ‘zero’ (which is the RESET value).
The function of RADR:RAL2/RADR:RAH2 and detection of the fixed group address FE
or FC
As an option in the auto mode, non-auto mode and address mode 1, the 8/16 bit address
field of received frames can be pushed to the receive data buffer (first one/two bytes of
the frame). This function is especially useful in conjunction with the extended broadcast
address recognition. It is enabled by setting control bit ’RADD’ in register CCR2.
8.1.9.3
If the ‘Shared Flag’ feature is enabled by setting bit ’SFLG’ in register CCR1 the closing
flag of a previously transmitted frame simultaneously becomes the opening flag of the
following frame if there is one already available in the SCC transmit FIFO.
In receive direction the SCC always expects and handles ’Shared Flags’. ’Shared
Zeroes’ of consecutive flags are also supported.
Data Sheet
rule violations (e.g. wrong CRC)
H
if applicable to the selected operating mode remains unchanged.
Special Functions
Extended Transparent Transmission and Reception
Receive Address Handling
Shared Flags
185
Detailed Protocol Description
PEB 20534
PEF 20534
2000-05-30
H