peb20534 Infineon Technologies Corporation, peb20534 Datasheet - Page 289

• Manufacturer Part Number: peb20534
• Description: Dma Supported Serial Communication Controller With 4 Channels
• Manufacturer: Infineon Technologies Corporation

Data Sheet
SOC(1..0)
DIV
ODS
ICD
Serial Output Control
This bit field selects the RTS signal output function.
(This bit field is only valid in bus configuration modes selected via bit field
SC(2:0) in register CCR0).
SOC = ’0X’
SOC = ’10’
SOC = ’11’
Data Inversion
This bit is only valid if NRZ data encoding is selected via bit field SC(2:0)
in register CCR0.
DIV=’0’
DIV=’1’
Note: It is recommended not to use DIV=’1’ in combination with high
Output Driver Select
The transmit data output pin TxD can be configured as push/pull or open
drain output chracteristic.
ODS=’0’
ODS=’1’
Invert Carrier Detect Pin Polarity
ICD=’0’
ICD=’1’
speed operation, i.e. clock mode 4 and CCR0.HS=’1’.
RTS ouput signal is active during transmission of a frame
(active low).
RTS ouput signal is always inactive (high).
RTS ouput signal is active during reception of a frame
(active low).
No Data Inversion.
Data is transmitted/received inverted (on a per bit basis).
In HDLC and HDLC Synchronous PPP modes the
continuous ’1’ idle sequence is NOT inverted.
Interframe time fill flag transmission is inverted.
TxD pin is open drain output.
TxD pin is push/pull output.
Carrier Detect (CD) input pin is active high.
Carrier Detect (CD) input pin is active low.
289
Detailed Register Description
PEB 20534
PEF 20534
(hdlc mode)
(all modes)
(all modes)
(all modes)
2000-05-30