NNDK-MOD5272-KIT NetBurner Inc, NNDK-MOD5272-KIT Datasheet - Page 182

• Manufacturer Part Number: NNDK-MOD5272-KIT
• Description: KIT DEVELOP NETWORK FOR MOD5272
• Manufacturer: NetBurner Inc
• Series: ColdFire®r

Specifications of NNDK-MOD5272-KIT

• Main Purpose: *
• Embedded: *
• Utilized Ic / Part: MOD5272
• Primary Attributes: *
• Secondary Attributes: *
• Processor To Be Evaluated: MOD5272
• Interface Type: RS-232, RS-485, USB
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Contains lead / RoHS non-compliant
• Other names: 528-1001

Interrupt Controller Registers
7.2.2 Interrupt Control Registers (ICR1–ICR4)
ICR1–ICR4 are used to configure interrupts from various on- and off-chip sources. When
read, the data is the last value written to the register with the exception of the PI bits, which
are transitory functions. These registers can be accessed as 8-, 16-, or 32-bit registers. An
8- or 16-bit write leaves the remaining bits intact. To avoid altering other IPL fields when
resetting interrupts generated by INT[6:1], read the required byte, word, or longword from
the appropriate ICR, AND.B/W/L its value with a mask whose IPL bits are all 1 and whose
PI bits are 1 for those sources whose PI bit is to be reset and 0 for those sources whose PI
bit is to be left unchanged.
7.2.2.1 Interrupt Control Register 1 (ICR1)
ICR1, Figure 7-2, is used to configure interrupts from various on- and off-chip sources.
Table 7-3 describes ICR1 fields.
Reset
Reset
7-4
Field INT1PI
Field TMR0PI
Addr
R/W
Table 7-2. Interrupt and Power Management Register Mnemonics (Continued)
ETx
ERx
ENTC
QSPI
IPL2, IPL1, IPL0
PI
PDN
WK
SWTO
31
15
Mnemonic or Portion Thereof
30
14
TMR0IPL
INT1IPL
Figure 7-2. Interrupt Control Register 1 (ICR1)
28
12
TMR1PI
INT2PI
27
11
MCF5272 User’s Manual
26
10
TMR1IPL
INT2IPL
0000_0000_0000_0000
0000_0000_0000_0000
Ethernet module transmit data interrupt
Ethernet module receive data interrupt
Ethernet module non-time-critical interrupt
Queued serial peripheral interface
Interrupt priority level bits 2–0
Pending interrupt
Power down enable
Wakeup enable
Software watchdog timer time out
MBAR + 0x020
24
8
R/W
TMR2PI
INT3PI
23
7
22
6
Description
TMR2IPL
INT3IPL
20
4
TMR3PI
INT4PI
19
3
18
2
MOTOROLA
TMR3IPL
INT4IPL
16
0