NNDK-MOD5272-KIT NetBurner Inc, NNDK-MOD5272-KIT Datasheet - Page 86

• Manufacturer Part Number: NNDK-MOD5272-KIT
• Description: KIT DEVELOP NETWORK FOR MOD5272
• Manufacturer: NetBurner Inc
• Series: ColdFire®r

Specifications of NNDK-MOD5272-KIT

• Main Purpose: *
• Embedded: *
• Utilized Ic / Part: MOD5272
• Primary Attributes: *
• Secondary Attributes: *
• Processor To Be Evaluated: MOD5272
• Interface Type: RS-232, RS-485, USB
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Contains lead / RoHS non-compliant
• Other names: 528-1001

MOVEA
MOVEM
MOVEQ
MSAC
MSACL
MULS
MULU
NEG
NEGX
NOP
NOT
OR
ORI
PEA
PULSE
REMS
REMU
RTS
Scc
SUB
SUBA
SUBI
SUBQ
SUBX
SWAP
TRAP
Instruction
Instruction Set Summary
2-18
<ea>y,Ax
#<list>,<ea-2>x
<ea-2>y,#<list>
#<data>,Dx
Ry,RxSF
Ry,RxSF,<ea-1>y,Rw
<ea>y,Dx
<ea>y,Dx
Dx
Dx
none
Dx
<ea>y,Dx
Dy,<ea>x
#<data>,Dx
<ea-3>y
none
<ea-1>,Dx
<ea-1>,Dx
none
Dx
<ea>y,Dx
Dy,<ea>x
<ea>y,Ax
#<data>,Dx
#<data>,<ea>x
Dy,Dx
Dx
#<vector>
Operand Syntax
Table 2-7. User-Mode Instruction Set Summary (Continued)
.W,.L → .L
.L
.L
.B → .L
.L - (.W × .W) → .L
.L - (.L × .L) → .L
.L - (.W × .W) → .L, .L
.L - (.L × .L) → .L, .L
.W X .W → .L
.L X .L → .L
.W X .W → .L
.L X .L → .L
.L
.L
Unsized
.L
.L
.L
.L
Unsized
.L
.L
Unsized
.B
.L
.L
.L
.L
.L
.L
.W
Unsized
Operand Size
MCF5272 User’s Manual
Source → destination
Listed registers → destination
Source → listed registers
Sign-extended immediate data → destination
ACC – (Ry × Rx){<< 1 | >> 1} → ACC
ACC – (Ry × Rx){<< 1 | >> 1} → ACC;
(<ea-1>y{&MASK}) → Rw
Source × destination → destination
Signed operation
Source × destination → destination
Unsigned operation
0 – destination → destination
0 – destination – X → destination
Synchronize pipelines; PC + 2 → PC
~ Destination → destination
Source | destination → destination
Immediate data | destination → destination
SP – 4 → SP; Address of <ea> → (SP)
Set PST= 0x4
Dx/<ea>y → Dw {32-bit remainder}
Signed operation
Dx/<ea>y → Dw {32-bit remainder}
Unsigned operation
(SP) → PC; SP + 4 → SP
If condition true, then 1s  destination;
Else 0s → destination
Destination – source → destination
Destination – source → destination
Destination – immediate data → destination
Destination – immediate data → destination
Destination – source – X → destination
MSW of Dx ←→ LSW of Dx
SP – 4 → SP;PC → (SP);
SP – 2 → SP;SR → (SP);
SP – 2 → SP; format → (SP);
Vector address → PC
Operation
MOTOROLA