NNDK-MOD5272-KIT NetBurner Inc, NNDK-MOD5272-KIT Datasheet - Page 429

• Manufacturer Part Number: NNDK-MOD5272-KIT
• Description: KIT DEVELOP NETWORK FOR MOD5272
• Manufacturer: NetBurner Inc
• Series: ColdFire®r

Specifications of NNDK-MOD5272-KIT

• Main Purpose: *
• Embedded: *
• Utilized Ic / Part: MOD5272
• Primary Attributes: *
• Secondary Attributes: *
• Processor To Be Evaluated: MOD5272
• Interface Type: RS-232, RS-485, USB
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Contains lead / RoHS non-compliant
• Other names: 528-1001

MOTOROLA
BGA
Map
K10
K11
K12
K13
K14
J10
J11
J12
J13
J14
Pin
K1
K2
K3
K4
K5
K6
K7
K8
K9
L1
L2
L3
L4
L5
L6
J8
J9
FSC1/FSR1/
QSPI_CLK/
Table 19-2. Signal Name and Description by Pin Number (Continued)
0 (Reset)
CS0/Boot
BUSW1
SDBA0
DFSC1
High Z
High Z
High Z
High Z
High Z
PA10
PA11
PA12
PA13
GND
TIN0
VDD
VDD
VDD
VDD
CS1
D7
D8
D9
D3
D4
D5
D6
Pin Functions
Ground
DOUT0
DREQ0
DFSC2
DFSC3
PWM_
+3.3V
+3.3V
OUT2
+3.3V
+3.3V
DIN0
PC7
PC8
PC9
PC3
PC4
PC5
PC6
1
–
–
–
–
–
–
–
–
–
Chapter 19. Signal Descriptions
URT1_RxD
URT1_RTS
URT1_TxD
QSPI_CS1
URT1_
TIN1
CTS
2
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
QSPI_
INT5
CS2
3
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
URT1_CTS/QSPI_CS2
QSPI_CLK / BUSW1
FSC1/FSR1/DFSC1
DOUT0/URT1_TxD
PWM_OUT2/TIN1
DIN0/URT1_RxD
URT1_RTS/INT5
PA11/QSPI_CS1
PA10/DREQ0
PA12/DFSC2
PA13/DFSC3
CS0/Boot
D7/PC7
D8/PC8
D9/PC9
D3/PC3
D4/PC4
D5/PC5
D6/PC6
SDBA0
Name
GND
TIN0
VDD
VDD
VDD
VDD
CS1
D7/port C bit 7
D8/port C bit 8
D9/port C bit 9
SDRAM bank 0 select
IDL/GCI data in/UART1
Rx data
UART1 CTS/QSPI_CS2 I/O
UART1 RTS/INT5
IDL-GCI data
Out/UART1 Tx data
Port A bit 10/IDL
DREQ0
PWM output compare 2
/Timer 1 input
Chip select 0
Chip select 1
D3/port C bit 3
D4/port C bit 4
D5/port C bit 5
D6/port C bit 6
Port A bit 11/QSPI chip
select 1
Port A bit 12/Delayed
frame sync 2
Port A bit 13/Delayed
frame sync 3
PLIC port 1 IDL
FSR/GCI
FSC1/Generated frame
sync 1 Out
QSPI serial clock/CS0
bus width bit 1
Timer 0 input
Description
Signal List
19-15
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
O
O
I
I