NNDK-MOD5272-KIT NetBurner Inc, NNDK-MOD5272-KIT Datasheet - Page 423

KIT DEVELOP NETWORK FOR MOD5272

NNDK-MOD5272-KIT

Manufacturer Part Number
NNDK-MOD5272-KIT
Description
KIT DEVELOP NETWORK FOR MOD5272
Manufacturer
NetBurner Inc
Series
ColdFire®r

Specifications of NNDK-MOD5272-KIT

Main Purpose
*
Embedded
*
Utilized Ic / Part
MOD5272
Primary Attributes
*
Secondary Attributes
*
Processor To Be Evaluated
MOD5272
Interface Type
RS-232, RS-485, USB
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Contains lead / RoHS non-compliant
Other names
528-1001
(see notes)
Configured
MOTOROLA
MTMOD
MTMOD
MTMOD
MTMOD
MTMOD
by
4
4
4
4
4
1
Table 19-1. Signal Descriptions Sorted by Function (Continued)
QSPI_Dout/
QSPI_CLK/
QSPI_CS0/
USB_CLK
QSPI_Din
0 (Reset)
SDCLKE
BYPASS
BUSW1
BUSW0
SDBA0
SDBA1
SDCLK
SDCS/
SDWE
WSEL
RSTO
RAS0
TRST
TEST
RSTI
TDO
TIN0
TMS
R/W
CS7
TCK
TEA
TDI
Pin Functions
PSTCLK
DSCLK
BKPT
DSO
DSI
1
Chapter 19. Signal Descriptions
2
3
QSPI serial clock/CS0
bus width bit 1
QSPI peripheral chip
select 0/CS0 bus width
bit 0
QSPI data input
QSPI data output/Bus
width selection
Read/Write
SDRAM row select
strobe
Device reset
Reset output strobe
SDRAM bank 0 select
SDRAM bank 1 select
SDRAM (bus) clock,
Same frequency as
CPU clock
SDRAM clock enable
SDRAM chip
select/CS7
SDRAM write enable
Bypass internal test
mode
JTAG test clock in/
BDM PSTCLK output
JTAG test data in/BDM
data in
JTAG test data out
/BDM data out
BDM debug transfer
error acknowledge
Device test mode
enable
Timer 0 input
JTAG test mode/BDM
select breakpoint input
JTAG reset/BDM clock
USB external 48-MHz
clock input
Description
BGA
Map
M12
M13
P14
A10
H12
E14
D13
B10
Pin
J14
M5
N4
C4
D5
D4
P4
F4
B9
A4
A3
E6
B4
L5
L6
J1
I/O
I/O
I/O
O
O
O
O
O
O
O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
I
Signal List
Drive
(mA)
10
10
10
10
10
10
10
10
4
2
4
4
4
4
4
19-9
Cpf
30
30
30
30
30
30
30
30
30
30
30
30
30
30
30

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