NNDK-MOD5272-KIT NetBurner Inc, NNDK-MOD5272-KIT Datasheet - Page 309

• Manufacturer Part Number: NNDK-MOD5272-KIT
• Description: KIT DEVELOP NETWORK FOR MOD5272
• Manufacturer: NetBurner Inc
• Series: ColdFire®r

Specifications of NNDK-MOD5272-KIT

• Main Purpose: *
• Embedded: *
• Utilized Ic / Part: MOD5272
• Primary Attributes: *
• Secondary Attributes: *
• Processor To Be Evaluated: MOD5272
• Interface Type: RS-232, RS-485, USB
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Contains lead / RoHS non-compliant
• Other names: 528-1001

MOTOROLA
13.3.3 Frame Sync Synthesis
Figure 13-11 illustrates the relationships between the various frame sync clocks. DFSC1 is
generated through programmable delay 1 referenced to DFSC0. DFSC2 and DFSC3 are
generated through programmable delays 2 and 3 referenced to DFSC1. Note well the
following:
DCL0/URT1_CLK
PA8/FSC0/FSR0
GCI/IDL
O192K
GCI/IDL
GCI/IDL
GCI/IDL
Port 1
Port 2
Port 3
Port 0
P1CR[FSM]
Figure 13-11. PLIC Internal Timing Signal Routing
CKI[1:0]
FSC0
FSC1
Chapter 13. Physical Layer Interface Controller (PLIC)
Mux
DCL0
DFSC0
DCL1
FSC1
DCL1
DFSC2
DCL1
DFSC3
Figure 13-12. PLIC Clock Generator
DFSC0
CMULT[2:0]
Prog Delay 0
Multiply
Block
P0SDR[15:0]
P1SDR[15:0]
P2SDR[15:0]
P3SDR[15:0]
Prog Delay 2
Prog Delay 1
Prog Delay 3
SFSC Gen
P0CR[M2-M0]
DFSC1
P1CR[M/S]
FDIV[2:0]
Divider
Block
2-KHz to CPU
Mux 1
Mux 0
Pin
Pin
PLIC Timing Generator
DCL0/URT1_CLK
PA8/FSC0/FSR0
DCL1/GDCL1_OUT
FSC1/FSR1/DFSC1
DFSC2
DFSC3
GDCL
Gen_FSC
13-13