NNDK-MOD5272-KIT NetBurner Inc, NNDK-MOD5272-KIT Datasheet - Page 279

• Manufacturer Part Number: NNDK-MOD5272-KIT
• Description: KIT DEVELOP NETWORK FOR MOD5272
• Manufacturer: NetBurner Inc
• Series: ColdFire®r

Specifications of NNDK-MOD5272-KIT

• Main Purpose: *
• Embedded: *
• Utilized Ic / Part: MOD5272
• Primary Attributes: *
• Secondary Attributes: *
• Processor To Be Evaluated: MOD5272
• Interface Type: RS-232, RS-485, USB
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Contains lead / RoHS non-compliant
• Other names: 528-1001

MOTOROLA
12.3.2.14 USB Endpoint 1–7 Control Register (EPnCTL)
Figure 12-17 shows the USB endpoint 1–7 control register.
Table 12-13 lists the field descriptions for the USB endpoint 1–7 control register.
15–8
Bits
Bits
1
0
7
Reset
Reset
Field
Field CRC_ERR ISO_MODE
Addr
R/W
R/W
CRC_ERR CRC error generation enable. Enables CRC error generation for debug and test purposes. To
IN_DONE
Name
Name
—
15
7
—
Figure 12-17. USB Endpoint 1-7 Control Register (EP
Table 12-12. EP0CTL Field Descriptions (Continued)
Reserved, should be cleared.
use this feature, the DEBUG bit must be set. Enabling this bit causes a CRC error on the next
non-zero-length data packet transmitted. The CRC_ERR bit must be set again in order to
generate another CRC error. This bit is only valid for IN endpoints. This command bit is write
only and always returns 0 when read.
0 Default Value
1 CRC error generation if DEBUG = 1
This bit controls the USB's response to IN tokens from the host. This bit is set at Reset
and must be cleared by software when the last byte of a transfer has been written to the
IN-FIFO. This bit is then subsequently set by the USB core when an end of transfer (EOT)
event occurs indicating that the transfer has been completed. An end of transfer (EOT)
event is indicated by one of the following:
0 CPU has completed writing to the IN-FIFO and transfer is in progress. The USB
1 Transfer completed or CPU Busy writing transfer into the IN-FIFO. The USB module
Reserved, should be cleared.
MBAR + 0x1052, 0x1056, 0x105A, 0x105E, 0x1062, 0x1066, 0x106A
6
module will send any amount of data in the FIFO or a zero-length packet when the
FIFO is empty.
will only send maximum size packets or NAK responses if the FIFO contains less than
a maximum size packet. This bit is set at Reset and on an EOT event.
Table 12-13. EP
a) An IN packet is transmitted that contains less than the maximum number of bytes
b) A zero length IN packet is transmitted. This occurs when the previously transmitted
defined at endpoint configuration.
IN packet was full, and no more data remains in the IN-FIFO. Hence a single zero
length packet must be sent to indicate EOT.
Chapter 12. Universal Serial Bus (USB)
5
—
n
CTL Field Descriptions
4
0000_0000
0000_0004
R/W
R/W
—
Register Description and Programming Model
Description
Description
3
FIFO_LVL
2
IN_DONE
n
CTL)
1
STALL
8
0
12-19