NNDK-MOD5272-KIT NetBurner Inc, NNDK-MOD5272-KIT Datasheet - Page 324

• Manufacturer Part Number: NNDK-MOD5272-KIT
• Description: KIT DEVELOP NETWORK FOR MOD5272
• Manufacturer: NetBurner Inc
• Series: ColdFire®r

Specifications of NNDK-MOD5272-KIT

• Main Purpose: *
• Embedded: *
• Utilized Ic / Part: MOD5272
• Primary Attributes: *
• Secondary Attributes: *
• Processor To Be Evaluated: MOD5272
• Interface Type: RS-232, RS-485, USB
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Contains lead / RoHS non-compliant
• Other names: 528-1001

PLIC Registers
13.5.16 GCI C/I Channel Receive Registers
All bits in these registers are read only and are cleared on hardware or software reset.
The PnGCIR registers contain the received C/I bits for one of each of the four ports on the
MCF5272.
13-28
Bits Name
Reset
Reset
31–29, 23–21,
27–24, 19–16,
Chan
Chan
Field
Field
1
0
Addr
28, 20, 12, 4
R/W
R/W
15–13, 7–5
11–8, 3–0
Bits
AB1
AB0
31
15
Figure 13-28. GCI C/I Channel Receive Registers (P0GCIR–P3GCIR)
(P0GCIR–P3GCIR)
Abort, port 1. See AB3.
Abort, port 0. See AB3.
—
—
C3–C0 C/I bits. These four bits are received on the GCI or SCIT channel 0. When a change in the
Name
—
F
MBAR + 0x374 (P0GCIR), 0x375 (P1GCIR), 0x376 (P2GCIR), 0x377 (P3GCIR)
29
13
Table 13-11. P0GCIR–P3GCIR Field Descriptions
Reserved, should be cleared.
Full. This bit is set by the C/I channel controller to indicate to the CPU that new C/I
channel data has been received and is available for processing. It is automatically cleared
by a CPU read. The clearing of this bit by reading this register also clears the aperiodic
GCR interrupt.
C/I data value is received in two successive frames, it is interpreted as being valid and is
passed on to the CPU, via this register. A maskable interrupt is generated when data is
written into any of the four available positions.
28
12
F
P0GCIR
F
P2GCIR
Table 13-10. PGMTS Field Descriptions
C3
C3
27
11
C2
C2
26
10
MCF5272 User’s Manual
0000_0000_0000_0000
0000_0000_0000_0000
C1
C1
25
9
Read Only
Read Only
C0
C0
24
8
Description
23
7
Description
—
—
21
5
20
P1GCIR
P3GCIR
F
F
4
C3
C3
19
3
C2
C2
18
2
MOTOROLA
C1
C1
17
1
C0
C0
16
0