NNDK-MOD5272-KIT NetBurner Inc, NNDK-MOD5272-KIT Datasheet - Page 446

• Manufacturer Part Number: NNDK-MOD5272-KIT
• Description: KIT DEVELOP NETWORK FOR MOD5272
• Manufacturer: NetBurner Inc
• Series: ColdFire®r

Specifications of NNDK-MOD5272-KIT

• Main Purpose: *
• Embedded: *
• Utilized Ic / Part: MOD5272
• Primary Attributes: *
• Secondary Attributes: *
• Processor To Be Evaluated: MOD5272
• Interface Type: RS-232, RS-485, USB
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Contains lead / RoHS non-compliant
• Other names: 528-1001

Physical Layer Interface Controller TDM Ports and UART 1
19.16.1.2 D-Channel Grant (DGNT0/PA9)
IDL mode: This pin can be independently configured as the input, DGNT0, used by a
layer-one ISDN S/T transceiver to indicate that D-channel access has been granted.
Port A mode: This pin can be independently configured as I/O pin PA9.
19.16.1.3 Data Clock (DCL0/URT1_CLK)
IDL mode: This pin is the clock used to clock data in and out of DIN0 and DOUT0 for IDL
port 0. Data is clocked into DIN0 on the falling edge and clocked out of DOUT0 on the
rising edge of DCL0.
GCI mode: This pin is used to clock data in and out of DIN0 and DOUT0 for GCI port 0.
DCL0 is twice the bit rate (two clocks per data bit).
UART1: URT1_CLK provides a clock input which can be the baud rate clock.
19.16.1.4 Serial Data Input (DIN0/URT1_RxD)
IDL mode: The DIN0 input is for clocking data into IDL port 0. Data is clocked into DIN0
on the falling edge of DCL0.
GCI mode: The DIN0 input is for clocking data into GCI port 0. DCL0 is twice the bit rate
(two clocks per data bit).
UART1: URT1_RxD is the receiver serial data input for the UART1 module. Data received
on this pin is sampled on the rising edge of the serial clock source with the least significant
bit first. When the UART1 clock is stopped for power-down mode, any transition on this
pin restarts it.
19.16.1.5 UART1 CTS (URT1_CTS/QSPI_CS2)
UART1: URT1_CTS is the clear-to-send input indicating to the UART1 module that it can
begin data transmission.
QSPI mode: This output pin provides a QSPI peripheral chip select, QSPI_CS2, when in
Master mode. QSPI_CS2 can be programmed to be active high or low.
19.16.1.6 UART1 RTS (UR T1_R TS /INT5)
Interrupt mode: This pin can be used as INT5.
UART1: The URT1_RTS output is an automatic request to send output from the UART1
module. It can be configured to be asserted and negated as a function of the RxFIFO level.
19.16.1.7 Serial Data Output (DOUT0/URT1_TxD)
IDL mode: The DOUT0 output is for clocking data out of IDL port 0. Data is clocked out
of DOUT0 on the rising edge of DCL0.
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MCF5272 User’s Manual
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