D12312SVTE25 Renesas Electronics America, D12312SVTE25 Datasheet - Page 357

• Manufacturer Part Number: D12312SVTE25
• Description: MCU 3V 0K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of D12312SVTE25

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 70
• Program Memory Type: ROMless
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Other names: HD6412312SVTE25; HD6412312SVTE25

Channel
Channel
4
5
Bit 7
IOB3
0
1
Bit 7
IOB3
0
1
Bit 6
IOB2
1
Bit 6
IOB2
1
0
0
1
0
×
Bit 5
IOB1
0
Bit 5
IOB1
0
0
1
1
0
1
×
0
1
1
0
1
Bit 4
IOB0 Description
0
1
Bit 4
IOB0 Description
0
1
0
1
0
1
1
0
0
1
×
×
0
1
0
1
1
0
0
1
×
TGR4B
is output
compare
register
TGR4B
is input
capture
register
TGR5B
is output
compare
register
TGR5B
is input
capture
register
Output disabled
Output disabled
Output disabled
Initial output is 0
output
Initial output is 1
output
Capture input
source is
TIOCB4 pin
Capture input
source is TGR3C
compare match/
input capture
Output disabled
Initial output is 0
output
Initial output is 1
output
Capture input
source is
TIOCB5 pin
Rev.7.00 Feb. 14, 2007 page 323 of 1108
Section 9 16-Bit Timer Pulse Unit (TPU)
Toggle output at compare
match
Toggle output at compare
match
0 output at compare match
1 output at compare match
Toggle output at compare
match
0 output at compare match
1 output at compare match
Input capture at rising edge
Input capture at falling edge
Input capture at both edges
Input capture at generation of
TGR3C compare match/
input capture
0 output at compare match
1 output at compare match
Toggle output at compare
match
0 output at compare match
1 output at compare match
Input capture at rising edge
Input capture at falling edge
Input capture at both edges
REJ09B0089-0700
(Initial value)
(Initial value)
×: Don’t care
×: Don’t care