D12312SVTE25 Renesas Electronics America, D12312SVTE25 Datasheet - Page 697

MCU 3V 0K 100-TQFP

D12312SVTE25

Manufacturer Part Number
D12312SVTE25
Description
MCU 3V 0K 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheet

Specifications of D12312SVTE25

Core Processor
H8S/2000
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
70
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Other names
HD6412312SVTE25
HD6412312SVTE25

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
D12312SVTE25V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
17.17.2 Software Protection
Software protection can be implemented by setting the SWE1 bit in flash memory control register
1 (FLMCR1), SWE2 bit in FLMCR2 erase block registers 1 and 2 (EBR1, EBR2), and the RAMS
bit in the RAM emulation register (RAMER). When software protection is in effect, setting the P1
or E1 bit in FLMCR1, or the P2 or E2 bit in FLMCR2 does not cause a transition to program
mode or erase mode (see table 17.33).
Table 17.33 Software Protection
Item
SWE bit protection
Block specification
protection
Emulation protection •
Description
Clearing the SWE1 bit to 0 in FLMCR1 sets
the program/erase-protected state for area
H'000000 to H'03FFFF (Execute in on-chip
RAM, external memory, or addresses
H'040000 to H'07FFFF)
Clearing the SWE2 bit to 0 in FLMCR2 sets
the program/erase-protected state for area
H'040000 to H'07FFFF (Execute in on-chip
RAM, external memory, or addresses
H'000000 to H'03FFFF)
Erase protection can be set for individual
blocks by settings in erase block registers 1
and 2 (EBR1, EBR2).
Setting EBR1 and EBR2 to H'00 places all
blocks in the erase-protected state.
Setting the RAMS bit to 1 in the RAM
emulation register (RAMER) places all blocks
in the program/erase-protected state.
Rev.7.00 Feb. 14, 2007 page 663 of 1108
Program
Yes
Yes
Functions
REJ09B0089-0700
Section 17 ROM
Erase
Yes
Yes
Yes

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