D12312SVTE25 Renesas Electronics America, D12312SVTE25 Datasheet - Page 730

• Manufacturer Part Number: D12312SVTE25
• Description: MCU 3V 0K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of D12312SVTE25

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 70
• Program Memory Type: ROMless
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Other names: HD6412312SVTE25; HD6412312SVTE25

Section 17 ROM
There are two memory MATs: user MAT and user boot MAT. The dedicated registers/parameters
are allocated for each operating mode and MAT selection. The correspondence of operating modes
and registers/parameters for use is shown in table 17.49.
Table 17.48 (1) Register Configuration
Name
Flash code control status register
Flash program code select register
Flash erase code select register
Flash key code register
Flash MAT select register
Flash transfer destination address
register
System control register 2
RAM emulation register
Notes: 1. The bits except the SCO bit are read-only bits. The SCO bit is a programming-only bit.
Table 17.48 (2) Parameter Configuration
Name
Download pass/fail result
Flash pass/fail result
Flash multipurpose address area
Flash multipurpose data destination
area
Flash erase block select
Flash program and erase frequency
control
Note: * One byte of the start address in the on-chip RAM area specified by FTDAR is valid.
Rev.7.00 Feb. 14, 2007 page 696 of 1108
REJ09B0089-0700
2. The initial value at initiation in user mode or user program mode is H'00.
3. SYSCR2 is dedicated to the F-ZTAT versions.
(The value which can be read is always 0.)
The initial value at initiation in user boot mode is H'AA.
Abbreviation
DPFR
FPFR
FMPAR
FMPDR
FEBS
FPEFEQ
FECS
FKEY
FMATS
SYSCR2 *
RAMER
Abbreviation
FCCS
FPCS
FTDAR
3
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R, W *
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
1
Undefined
Initial Value
Undefined
Undefined
Undefined
Undefined
Undefined
Initial Value
H'00
H'80
H'00
H'00
H'00
H'00 *
H'AA *
H'00
H'00
H'00
2
2
On-chip RAM *
R0L of CPU
ER1 of CPU
ER0 of CPU
ER0 of CPU
ER0 of CPU
Address
Address
H'FFC4
H'FFC5
H'FFC6
H'FFC8
H'FFC9
H'FFCA
H'FF42
H'FEDB