D12312SVTE25 Renesas Electronics America, D12312SVTE25 Datasheet - Page 475

• Manufacturer Part Number: D12312SVTE25
• Description: MCU 3V 0K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of D12312SVTE25

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 70
• Program Memory Type: ROMless
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Other names: HD6412312SVTE25; HD6412312SVTE25

12.2.6
SCR is a register that performs enabling or disabling of SCI transfer operations, serial clock output
in asynchronous mode, and interrupt requests, and selection of the serial clock source.
SCR can be read or written to by the CPU at all times.
SCR is initialized to H'00 by a reset and in hardware standby mode. In software standby mode and
module stop mode it retains its previous state.
Bit 7—Transmit Interrupt Enable (TIE): Enables or disables transmit-data-empty interrupt
(TXI) request generation when serial transmit data is transferred from TDR to TSR and the TDRE
flag in SSR is set to 1.
Bit 7
TIE
0
1
Note:* TXI interrupt request cancellation can be performed by reading 1 from the TDRE flag, then
Bit
Initial value :
R/W
clearing it to 0, or by clearing the TIE bit to 0.
Serial Control Register (SCR)
Description
Transmit-data-empty interrupt (TXI) requests disabled *
Transmit-data-empty interrupt (TXI) requests enabled
:
:
R/W
TIE
7
0
R/W
RIE
6
0
R/W
TE
5
0
Section 12 Serial Communication Interface (SCI)
R/W
RE
4
0
Rev.7.00 Feb. 14, 2007 page 441 of 1108
MPIE
R/W
3
0
TEIE
R/W
2
0
REJ09B0089-0700
CKE1
R/W
1
0
(Initial value)
CKE0
R/W
0
0