D12312SVTE25 Renesas Electronics America, D12312SVTE25 Datasheet - Page 751

• Manufacturer Part Number: D12312SVTE25
• Description: MCU 3V 0K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of D12312SVTE25

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 70
• Program Memory Type: ROMless
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Other names: HD6412312SVTE25; HD6412312SVTE25

17.23.3 System Control Register 2 (SYSCR2)
SYSCR2 is an 8-bit readable/writable register that performs on-chip flash memory control.
SYSCR2 is initialized to H'00 by a reset and in hardware standby mode.
SYSCR2 can only be used in the F-ZTAT versions. In the mask ROM versions this register will
return an undefined value if read, and cannot be modified.
Bits 7 to 4—Reserved: These bits cannot be modified and are always read as 0.
Bit 3—Flash Memory Control Register Enable (FLSHE): Controls CPU access to the flash
memory control registers (FCCS, FPCS, FECS, FKEY, FMATS, FTDAR). Writing 1 to the
FLSHE bit enables the flash memory control registers to be read and written to. Clearing FLSHE
to 0 designates these registers as unselected (the register contents are retained).
Bit 3
FLSHE
0
1
Bits 2 and 1—Reserved: These bits cannot be modified and are always read as 0.
Bit 0—Reserved: Only 0 may be written to this bit.
Bit
Initial value :
R/W
Description
Flash control registers are not selected for addresses H'FFFFC4 to H'FFFFCF
Flash control registers are selected for addresses H'FFFFC4 to H'FFFFCF
:
:
—
—
7
0
—
—
6
0
—
—
5
0
—
—
4
0
Rev.7.00 Feb. 14, 2007 page 717 of 1108
FLSHE
R/W
3
0
—
—
2
0
REJ09B0089-0700
Section 17 ROM
—
—
1
0
(Initial value)
R/W
—
0
0