D12312SVTE25 Renesas Electronics America, D12312SVTE25 Datasheet - Page 746

• Manufacturer Part Number: D12312SVTE25
• Description: MCU 3V 0K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of D12312SVTE25

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 70
• Program Memory Type: ROMless
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Other names: HD6412312SVTE25; HD6412312SVTE25

Section 17 ROM
(c) Flash pass/fail parameter (FPFR: general register R0L of CPU)
An explanation of FPFR as the return value indicating the programming result is provided here.
Bit 7—Reserved: Returns 0.
Bit 6—Programming Mode Related Setting Error Detect (MD): Returns the check result of
whether the error protection state has been entered.
If the error protection state has been entered, 1 is written to this bit. This state can be confirmed by
checking bit 4, FLER, in the FCCS register. For conditions to enter the error protection state, see
section 17.25.3, Error Protection.
Bit 6
MD
0
1
Bit 5—Programming Execution Error Detect (EE): 1 is returned to this bit when the specified
data could not be written because the user MAT was not erased.
If this bit is set to 1, there is a high possibility that the user MAT is partially rewritten. In this case,
after removing the error factor, erase the user MAT.
If FMATS is set to H'AA and the user boot MAT is selected, an error occurs when programming
is performed. In this case, both the user MAT and user boot MAT are not rewritten.
Programming of the user boot MAT should be performed in the boot mode or PROM mode.
Bit 5
EE
0
1
Rev.7.00 Feb. 14, 2007 page 712 of 1108
REJ09B0089-0700
Bit
Initial value :
R/W
:
:
Description
FLER setting is normal (FLER = 0)
FLER = 1, and programming cannot be performed
Description
Programming has ended normally
Programming has ended abnormally (programming result is not guaranteed)
—
—
7
0
R/W
MD
—
6
R/W
EE
—
5
R/W
FK
—
4
—
—
3
0
R/W
WD
—
2
R/W
WA
—
1
R/W
SF
—
0