D12312SVTE25 Renesas Electronics America, D12312SVTE25 Datasheet - Page 522

• Manufacturer Part Number: D12312SVTE25
• Description: MCU 3V 0K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of D12312SVTE25

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 70
• Program Memory Type: ROMless
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Other names: HD6412312SVTE25; HD6412312SVTE25

Section 12 Serial Communication Interface (SCI)
In serial reception, the SCI operates as described below.
[1] The SCI performs internal initialization in synchronization with serial clock input or output.
[2] The received data is stored in RSR in LSB-to-MSB order.
[3] If the RIE bit in SCR is set to 1 when the RDRF flag changes to 1, a receive-data-full interrupt
Figure 12.19 shows an example of SCI operation in reception.
Simultaneous serial data transmission and reception (synchronous mode): Figure 12.20
shows a sample flowchart for simultaneous serial transmit and receive operations.
The following procedure should be used for simultaneous serial data transmit and receive
operations.
Rev.7.00 Feb. 14, 2007 page 488 of 1108
REJ09B0089-0700
Serial
clock
Serial
data
RDRF
ORER
After reception, the SCI checks whether the RDRF flag is 0 and the receive data can be
transferred from RSR to RDR.
If this check is passed, the RDRF flag is set to 1, and the receive data is stored in RDR. If a
receive error is detected in the error check, the operation is as shown in table 12.11.
Neither transmit nor receive operations can be performed subsequently when a receive error
has been found in the error check.
(RXI) request is generated.
Also, if the RIE bit in SCR is set to 1 when the ORER flag changes to 1, a receive-error
interrupt (ERI) request is generated.
RXI interrupt request
generated
Bit 7
Figure 12.19 Example of SCI Receive Operation
RDR data read and
RDRF flag cleared to 0
in RXI interrupt handling
routine
Bit 0
1 frame
Bit 7
Bit 0
RXI interrupt request
generated
Bit 1
ERI interrupt request
generated by overrun
error
Bit 6
Bit 7