D12312SVTE25 Renesas Electronics America, D12312SVTE25 Datasheet - Page 754

• Manufacturer Part Number: D12312SVTE25
• Description: MCU 3V 0K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of D12312SVTE25

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 70
• Program Memory Type: ROMless
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Other names: HD6412312SVTE25; HD6412312SVTE25

Section 17 ROM
17.24
When the pin is set in on-board programming mode and the reset start is executed, the on-board
programming state that can program/erase the on-chip flash memory is entered. On-board
programming mode has three operating modes: user programming mode, user boot mode, and
boot mode.
Table 17.52 lists the pin setting for entering each mode. For details on the state transition of each
mode for flash memory, see figure 17.61.
Table 17.52 Setting On-Board Programming Modes
MCU Mode
User boot mode
Boot mode
User program mode *
Note: * Normally, user mode should be used. Before downloading a program/erase program, set
17.24.1 Boot Mode
Boot mode executes programming/erasing user MAT and user boot MAT by means of the control
command and program data transmitted from the host using the on-chip SCI. The tool for
transmitting the control command and program data must be prepared in the host. The SCI
communication mode is set to asynchronous mode. When reset start is executed after this LSI's pin
is set in boot mode, the boot program in the microcomputer is initiated. After the SCI bit rate is
automatically adjusted, the communication with the host is executed by means of the control
command method.
The system configuration diagram in boot mode is shown in figure 17.65. For details on the pin
setting in boot mode, see table 17.52. The NMI and other interrupts are ignored in boot mode.
Make sure the NMI and other interrupts do not occur in the user system.
Rev.7.00 Feb. 14, 2007 page 720 of 1108
REJ09B0089-0700
the FLSHE bit to 1 to switch to the user program mode.
On-Board Programming Mode
CPU Operating
Modes/Description
Advanced single-chip mode
Advanced expanded mode with
on-chip ROM enabled
Advanced single-chip mode
Advanced expanded mode with
on-chip ROM enabled
Advanced single-chip mode
Mode
MD2
0
0
1
MD1
0
1
1
Pins
MD0
1
0
1
0
1