D12312SVTE25 Renesas Electronics America, D12312SVTE25 Datasheet - Page 453

MCU 3V 0K 100-TQFP

D12312SVTE25

Manufacturer Part Number
D12312SVTE25
Description
MCU 3V 0K 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheet

Specifications of D12312SVTE25

Core Processor
H8S/2000
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
70
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Other names
HD6412312SVTE25
HD6412312SVTE25

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
D12312SVTE25V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
11.2.2
Note: * Only 0 can be written, to clear the flag.
TCSR is an 8-bit readable/writable * register. Its functions include selecting the clock source to be
input to TCNT, and the timer mode.
TCR is initialized to H'18 by a reset and in hardware standby mode. It is not initialized in software
standby mode.
Note: * TCSR is write-protected by a password to prevent accidental overwriting. For details see
Bit 7—Overflow Flag (OVF): Indicates that TCNT has overflowed from H'FF to H'00, when in
interval timer mode. This flag cannot be set during watchdog timer operation.
Bit 7
OVF
0
1
Note: * When OVF is polled and the interval timer interrupt is disabled, OVF = 1 must be read at
Bit 6—Timer Mode Select (WT/IT): Selects whether the WDT is used as a watchdog timer or
interval timer. If used as an interval timer, the WDT generates an interval timer interrupt request
(WOVI) when TCNT overflows. If used as a watchdog timer, the WDT generates the WDTOVF
signal *
Bit
Initial value :
R/W
1
least twice.
section 11.2.4, Notes on Register Access.
when TCNT overflows.
Timer Control/Status Register (TCSR)
Description
[Clearing condition]
Cleared by reading TCSR when OVF = 1 * , then writing 0 to OVF
[Setting condition]
Set when TCNT overflows (changes from H'FF to H'00) in interval timer mode
:
:
R/(W) *
OVF
7
0
WT/IT
R/W
6
0
TME
R/W
5
0
4
1
Rev.7.00 Feb. 14, 2007 page 419 of 1108
3
1
Section 11 Watchdog Timer
CKS2
R/W
2
0
REJ09B0089-0700
CKS1
R/W
1
0
(Initial value)
CKS0
R/W
0
0

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