D12312SVTE25 Renesas Electronics America, D12312SVTE25 Datasheet - Page 615

• Manufacturer Part Number: D12312SVTE25
• Description: MCU 3V 0K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of D12312SVTE25

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 70
• Program Memory Type: ROMless
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Other names: HD6412312SVTE25; HD6412312SVTE25

17.5
17.5.1
FLMCR1 is an 8-bit register used for flash memory operating mode control. Program-verify mode
or erase-verify mode is entered by setting SWE to 1 when FWE = 1, then setting the EV or PV bit.
Program mode is entered by setting SWE to 1 when FWE = 1, then setting the PSU bit, and finally
setting the P bit. Erase mode is entered by setting SWE to 1 when FWE = 1, then setting the ESU
bit, and finally setting the E bit. FLMCR1 is initialized by a reset, and in hardware standby mode
and software standby mode. Its initial value is H'80 when a high level is input to the FWE pin, and
H'00 when a low level is input. When on-chip flash memory is disabled, a read will return H'00,
and writes are invalid.
Writes to the SWE bit in FLMCR1 are enabled only when FWE = 1; writes to bits ESU, PSU, EV,
and PV only when FWE = 1 and SWE = 1; writes to the E bit only when FWE = 1, SWE = 1, and
ESU = 1; and writes to the P bit only when FWE = 1, SWE = 1, and PSU = 1.
Bit 7—Flash Write Enable Bit (FWE): Sets hardware protection against flash memory
programming/erasing.
Bit 7
FWE
0
1
Bit 6—Software Write Enable Bit (SWE): Enables or disables flash memory programming and
erasing. This bit should be set when setting FLMCR1 bits 5 to 0, EBR1 bits 7 to 0, and EBR2 bits
3 to 0 * .
When SWE = 1, the flash memory can only be read in program-verify or erase-verify mode.
Note: * EBR2 bits 5 to 0 should be set in the H8S/2315 F-ZTAT and H8S/2314 F-ZTAT.
Bit
Initial value :
R/W
Bits 1 and 0 should be set in the H8S/2317 F-ZTAT.
Register Descriptions
Flash Memory Control Register 1 (FLMCR1)
Description
When a low level is input to the FWE pin (hardware-protected state)
When a high level is input to the FWE pin
:
:
FWE
1/0
R
7
SWE
R/W
6
0
ESU
R/W
5
0
PSU
R/W
4
0
Rev.7.00 Feb. 14, 2007 page 581 of 1108
R/W
EV
3
0
R/W
PV
2
0
REJ09B0089-0700
Section 17 ROM
R/W
E
1
0
R/W
P
0
0