DF2148ATE20 Renesas Electronics America, DF2148ATE20 Datasheet - Page 10

• Manufacturer Part Number: DF2148ATE20
• Description: IC H8S MCU FLASH 128K 100-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2148ATE20

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: Host Interface, I²C, IrDA, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 74
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: HD64F2148ATE20; HD64F2148ATE20

Rev. 4.00 Sep 27, 2006 page viii of xliv
Item
1.3.2 Pin Functions in
Each Operating Mode
Table 1.2 (a) Pin
Functions in Each
Operating Mode
Table 1.2 (b)
H8S/2147N Pin
Functions in Each
Operating Mode
1.3.3 Pin Functions
Table 1.3 Pin Functions
2.6.1 Overview
Table 2.1 Instruction
Classification
3.2.4 Serial Timer
Control Register (STCR)
4.5 Stack Status after
Exception Handling
Figure 4.5 (2) Stack
Status after Exception
Handling (Advanced
Mode)
Page
14
17
19
21
30
33
52
89
111
Revision (See Manual for Details)
Mode 1 description of pin 35 amended
(Before) P67/TMOX/CIN/KIN7/IRQ7
(After) P67/TMOX/CIN7/KIN7/IRQ7
Modes 2 and 3 in single chip modes of pin 95 amended
(Before) P82
Mode 1 description of pin 35 amended
(Before) P67/CIN/KIN7/IRQ7
Modes 2 and 3 in single chip modes of pin 95 amended
(Before) P82
Table 1.3 amended
Instruction in arithmetic operations amended
(Before) EG
Bit 3 bit table amended
Note * deleted from figure 4.5 (2)
Type
Host
interface
(HIF)
Type
I/O ports
Bit 3
FLSHE
0
1
Description
Addresses H'(FF)FF80 to H'(FF)FF87 are used for power-down mode control register
and supporting module control register access
Addresses H'(FF)FF80 to H'(FF)FF87 are used for flash memory control register
access (F-ZTAT version only)
Symbol
HIRQ11
HIRQ1
HIRQ12
HIRQ3
HIRQ4
Symbol
PA7 to
PA0
(After) NEG
Pin No.
FP-100B
TFP-100B
52
53
54
91
90
Pin No.
FP-100B
TFP-100B
10, 11, 20,
21, 30, 31,
47, 48
(After) P82/HIFSD
(After) P82/HIFSD
I/O
Output Host interrupt 11, 1, 12, 3, and 4: Output pins for
I/O
Input/
output
Name and Function
interrupt requests to the host.
Name and Function
Port A: Eight input/output pins. The data direction
of each pin can be selected in the port A data
direction register (PADDR). These pins have built-in
MOS input pull-ups. These are the VCCB drive
pins. [H8S/2148 Group and H8S/2147N only]
(After) P67/CIN7/KIN7/IRQ7
(Initial value)