DF2148ATE20 Renesas Electronics America, DF2148ATE20 Datasheet - Page 535

IC H8S MCU FLASH 128K 100-QFP

DF2148ATE20

Manufacturer Part Number
DF2148ATE20
Description
IC H8S MCU FLASH 128K 100-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheets

Specifications of DF2148ATE20

Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
Host Interface, I²C, IrDA, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
74
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F2148ATE20
HD64F2148ATE20

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2148ATE20IV
Manufacturer:
Renesas Electronics America
Quantity:
135
Part Number:
DF2148ATE20IV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Thus the receive margin in asynchronous mode is given by equation (1) below.
Where M: Receive margin (%)
Assuming values of F = 0 and D = 0.5 in equation (1), a receive margin of 46.875% is given by
equation (2) below.
When D = 0.5 and F = 0,
However, this is only a theoretical value, and a margin of 20% to 30% should be allowed in
system design.
Internal base
clock
Receive data
(RxD)
Synchronization
sampling timing
Data sampling
timing
N: Ratio of bit rate to clock (N = 16)
D: Clock duty (D = 0 to 1.0)
L: Frame length (L = 9 to 12)
F: Absolute value of clock rate deviation
M = 0.5 –
M =
= 46.875%
Figure 15.23 Receive Data Sampling Timing in Asynchronous Mode
0.5 –
0
2
2N
1
1
8 clocks
16
Start bit
– (L – 0.5)F –
100%
16 clocks
7
D – 0.5
N
Section 15 Serial Communication Interface (SCI, IrDA)
(1 + F)
15 0
Rev. 4.00 Sep 27, 2006 page 489 of 1130
100%
D0
7
.......... (1)
.......... (2)
REJ09B0327-0400
15 0
D1

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