DF2148ATE20 Renesas Electronics America, DF2148ATE20 Datasheet - Page 19

IC H8S MCU FLASH 128K 100-QFP

DF2148ATE20

Manufacturer Part Number
DF2148ATE20
Description
IC H8S MCU FLASH 128K 100-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheets

Specifications of DF2148ATE20

Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
Host Interface, I²C, IrDA, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
74
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F2148ATE20
HD64F2148ATE20

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2148ATE20IV
Manufacturer:
Renesas Electronics America
Quantity:
135
Part Number:
DF2148ATE20IV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Item
23.10.7 Status Read
Mode
Figure 23.22 Status
Read Mode Timing
Waveforms
24.7 Subclock Input
Circuit
25.12 Usage Notes
26.2.6 Flash Memory
Characteristics
Table 26.15 Flash
Memory Characteristics
(Programming/erasing
operating range)
26.3.3 AC
Characteristics
Table 26.20 Clock
Timing
Table 26.25 I
Timing
2
C Bus
Page
727
740
764
799
800
819
829
Revision (See Manual for Details)
Figure 23.22 amended
Note on Subclock Usage
Description added
Section 25.12 added
Table 26.15 amended
Notes 8 to 10 added
Notes: 8. Minimum number of times for which all
characteristics are guaranteed after rewriting (Guarantee range
is 1 to minimum value).
9. Reference value for 25°C (as a guideline, rewriting should
normally function up to this value).
10. Data retention characteristic when rewriting is performed
within the specification range, including the minimum value.
Table 26.20 amended
Table 26.25 amended
Item
Reprogramming count
Data retention time *
Programming Wait time after SWE-bit setting *
Item
Oscillation settling
time at reset
(crystal)
Oscillation settling
time in software
standby (crystal)
Item
SCL, SDA input
fall time
SCL, SDA output
fall time
SCL, SDA input
spike pulse
elimination time
WE
OE
CE
t
t
ces
f
t
wep
10
Symbol
t
t
t
t
Sf
of
SP
ds
Symbol
t
t
OSC1
OSC2
t
ceh
t
dh
t
r
t
nxtc
Min
20 + 0.1 Cb —
Min
10
8
Condition A
t
t
ces
f
20 MHz
Rev. 4.00 Sep 27, 2006 page xvii of xliv
t
wep
Max
t
Ratings
ds
t
t
dh
1
ceh
Typ
t
r
Symbol Min
N
t
x
DRP
Min
10
8
WEC
Condition B
t
16 MHz
nxtc
Max
300
250
1
Max
100 *
10
10
Unit
ns
ns
t
cyc
8
Min
20
8
t
Typ
10000 *
Condition C
ce
t
oe
10 MHz
Test Conditions Notes
Max
9
Max
Unit
ms
ms
Unit
Times
Years
µs
t
df
t
Test
Conditions
Figure 26.6
Figure 26.7
Figure 26.28
nxtc
Test
Condition

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