DF2148ATE20 Renesas Electronics America, DF2148ATE20 Datasheet - Page 629

• Manufacturer Part Number: DF2148ATE20
• Description: IC H8S MCU FLASH 128K 100-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2148ATE20

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: Host Interface, I²C, IrDA, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 74
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: HD64F2148ATE20; HD64F2148ATE20

Provided in the H8S/2148 Group and H8S/2147N; not provided in the H8S/2144 Group.
18.1
The H8S/2148 Group and H8S/2147N have an on-chip host interface (HIF) that enables
connection to an ISA bus, widely used as the internal bus in personal computers. The host
interface provides a four-channel parallel interface between the on-chip CPU and a host processor.
The host interface is available only when the HI12E bit is set to 1 in SYSCR2. This mode is called
slave mode, because it is designed for a master-slave communication system in which the
H8S/2148 Group and H8S/2147N chip is slaved to a host processor.
18.1.1
The features of the host interface are summarized below.
The host interface consists of 8-byte data registers, 4-byte status registers, a 2-byte control
register, fast A20 gate logic, and a host interrupt request circuit. Communication is carried out via
seven control signals from the host processor (CS1, CS2 or ECS2, CS3, CS4, HA0, IOR, and
IOW), six output signals to the host processor (GA20, HIRQ1, HIRQ11, HIRQ12, HIRQ3, and
HIRQ4), and an 8-bit bidirectional command/data bus (HDB7 to HDB0). The CS1, CS2 (or
ECS2), CS3, and CS4 signals select one of the four interface channels.
Overview
Features
Section 18 Host Interface
Rev. 4.00 Sep 27, 2006 page 583 of 1130
Section 18 Host Interface
REJ09B0327-0400