DF2148ATE20 Renesas Electronics America, DF2148ATE20 Datasheet - Page 731

IC H8S MCU FLASH 128K 100-QFP

DF2148ATE20

Manufacturer Part Number
DF2148ATE20
Description
IC H8S MCU FLASH 128K 100-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheets

Specifications of DF2148ATE20

Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
Host Interface, I²C, IrDA, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
74
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F2148ATE20
HD64F2148ATE20

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2148ATE20IV
Manufacturer:
Renesas Electronics America
Quantity:
135
Part Number:
DF2148ATE20IV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
23.1
H8S/2148 F-ZTAT A-mask version and H8S/2144 F-ZTAT A-mask version have 128 kbytes, and
H8S/2147 F-ZTAT A-mask version has 64 kbytes of on-chip flash memory. The flash memory is
connected to the bus master by a 16-bit data bus. The bus master accesses both byte and word data
in one state, enabling faster instruction fetches and higher processing speed.
The mode pins (MD1 and MD0) and the EXPE bit in MDCR can be set to enable or disable the
on-chip ROM.
The flash memory versions of this group can be erased and programmed on-board as well as with
a general-purpose PROM programmer.
23.1.1
Figure 23.1 shows a block diagram of the ROM.
Section 23 ROM
Overview
Block Diagram
(A-mask versions of the H8S/2148 F-ZTAT and H8S/2144 F-ZTAT)
(H8S/2148 F-ZTAT A-Mask Version,
H8S/2144 F-ZTAT A-Mask Version)
H8S/2147 F-ZTAT A-Mask Version,
(H8S/2148 F-ZTAT A-Mask Version, H8S/2147 F-ZTAT A-Mask Version, H8S/2144 F-ZTAT A-Mask Version)
Figure 23.1 ROM Block Diagram
H'01FFFE
H'000000
H'000002
Internal data bus (upper 8 bits)
Internal data bus (lower 8 bits)
Section 23 ROM
H'01FFFF
H'000001
H'000003
Rev. 4.00 Sep 27, 2006 page 685 of 1130
REJ09B0327-0400

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