DF2148ATE20 Renesas Electronics America, DF2148ATE20 Datasheet - Page 356

IC H8S MCU FLASH 128K 100-QFP

DF2148ATE20

Manufacturer Part Number
DF2148ATE20
Description
IC H8S MCU FLASH 128K 100-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheets

Specifications of DF2148ATE20

Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
Host Interface, I²C, IrDA, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
74
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F2148ATE20
HD64F2148ATE20

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Part Number
Manufacturer
Quantity
Price
Part Number:
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Manufacturer:
Renesas Electronics America
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Part Number:
DF2148ATE20IV
Manufacturer:
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Section 11 16-Bit Free-Running Timer
11.1.4
Table 11.2 lists the registers of the free-running timer module.
Table 11.2 Register Configuration
Name
Timer interrupt enable register
Timer control/status register
Free-running counter
Output compare register A
Output compare register B
Timer control register
Timer output compare control
register
Input capture register A
Input capture register B
Input capture register C
Input capture register D
Output compare register AR
Output compare register AF
Output compare register DM
Module stop control register
Notes: 1. Lower 16 bits of the address.
Rev. 4.00 Sep 27, 2006 page 310 of 1130
REJ09B0327-0400
2. Bits 7 to 1 are read-only; only 0 can be written to clear the flags.
3. OCRA and OCRB share the same address. Access is controlled by the OCRS
4. ICRA, ICRB, and ICRC share the same addresses with OCRAR, OCRAF, and
Register Configuration
Bit 0 is readable/writable.
bit in TOCR.
OCRDM. Access is controlled by the ICRS bit in TOCR.
OCRA
OCRB
OCRAR
OCRAF
Abbreviation
TIER
TCSR
FRC
TCR
TOCR
ICRA
ICRB
ICRC
ICRD
OCRDM
MSTPCRH
MSTPCRL
R/W
R/W
R/(W) *
R/W
R/W
R/W
R/W
R/W
R
R
R
R
R/W
R/W
R/W
R/W
R/W
2
Initial Value
H'01
H'00
H'0000
H'FFFF
H'FFFF
H'00
H'00
H'0000
H'0000
H'0000
H'0000
H'FFFF
H'FFFF
H'0000
H'3F
H'FF
H'FF90
H'FF92
H'FF94 *
H'FF94 *
H'FF96
H'FF98 *
H'FF9A *
H'FF9C *
H'FF9E
H'FF98 *
H'FF9A *
H'FF9C *
H'FF86
Address *
H'FF91
H'FF97
H'FF87
3
3
4
4
4
4
4
4
1

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