DF2148ATE20 Renesas Electronics America, DF2148ATE20 Datasheet - Page 609

IC H8S MCU FLASH 128K 100-QFP

DF2148ATE20

Manufacturer Part Number
DF2148ATE20
Description
IC H8S MCU FLASH 128K 100-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheets

Specifications of DF2148ATE20

Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
Host Interface, I²C, IrDA, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
74
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F2148ATE20
HD64F2148ATE20

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2148ATE20IV
Manufacturer:
Renesas Electronics America
Quantity:
135
Part Number:
DF2148ATE20IV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
17.2
17.2.1
Note:
KBCRH is an 8-bit readable/writable register that indicates the operating status of the keyboard
buffer controller.
KBCRH is initialized to H'70 by a reset, and in standby mode, watch mode, subactive mode,
subsleep mode, and module stop mode. Bits 6, 5, and 2 to 0 are also initialized when KBIOE is
cleared to 0.
Bit 7—Keyboard In/Out Enable (KBIOE): Selects whether or not the keyboard buffer
controller is used. When KBIOE is set to 1, the keyboard buffer controller is enabled for
transmission and reception and the port pins function as KCLK and KD I/O pins. When KBIOE is
cleared to 0, the keyboard buffer controller stops functioning and the port pins go to the high-
impedance state.
Bit 7
KBIOE
0
1
Bit 6—Keyboard Clock In (KCLKI): Monitors the KCLK I/O pin. This bit cannot be modified.
Bit 6
KCLKI
0
1
Bit
Initial value
Read/Write
* Only 0 can be written, to clear the flags.
Register Descriptions
Keyboard Control Register H (KBCRH)
Description
The keyboard buffer controller is non-operational (KCLK and KD signal pins have
port functions)
The keyboard buffer controller is enabled for transmission and reception (KCLK and
KD signal pins are in the bus drive state)
Description
KCLK I/O pin is low
KCLK I/O pin is high
KBIOE
R/W
7
0
KCLKI
R
6
1
KDI
R
5
1
KBFSEL
R/W
4
1
Rev. 4.00 Sep 27, 2006 page 563 of 1130
KBIE
R/W
3
0
Section 17 Keyboard Buffer Controller
R/(W) *
KBF
2
0
R/(W) *
PER
1
0
REJ09B0327-0400
(Initial value)
(Initial value)
KBS
R
0
0

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