DF2148ATE20 Renesas Electronics America, DF2148ATE20 Datasheet - Page 363

IC H8S MCU FLASH 128K 100-QFP

DF2148ATE20

Manufacturer Part Number
DF2148ATE20
Description
IC H8S MCU FLASH 128K 100-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheets

Specifications of DF2148ATE20

Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
Host Interface, I²C, IrDA, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
74
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F2148ATE20
HD64F2148ATE20

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2148ATE20IV
Manufacturer:
Renesas Electronics America
Quantity:
135
Part Number:
DF2148ATE20IV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Bit 6—Input Capture Flag B (ICFB): This status flag indicates that the FRC value has been
transferred to ICRB by means of an input capture signal. When BUFEB = 1, ICFB indicates that
the old ICRB value has been moved into ICRD and the new FRC value has been transferred to
ICRB.
ICFB must be cleared by software. It is set by hardware, however, and cannot be set by software.
Bit 5—Input Capture Flag C (ICFC): This status flag indicates that the FRC value has been
transferred to ICRC by means of an input capture signal. When BUFEA = 1, on occurrence of the
signal transition in FTIC (input capture signal) specified by the IEDGC bit, ICFC is set but data is
not transferred to ICRC. Therefore, in buffer operation, ICFC can be used as an external interrupt
signal (by setting the ICICE bit to 1).
ICFC must be cleared by software. It is set by hardware, however, and cannot be set by software.
Bit 7
ICFA
0
1
Bit 6
ICFB
0
1
Bit 5
ICFC
0
1
Description
[Clearing condition]
Read ICFA when ICFA = 1, then write 0 in ICFA
[Setting condition]
When an input capture signal causes the FRC value to be transferred to
ICRA
Description
[Clearing condition]
Read ICFB when ICFB = 1, then write 0 in ICFB
[Setting condition]
When an input capture signal causes the FRC value to be transferred to ICRB
Description
[Clearing condition]
Read ICFC when ICFC = 1, then write 0 in ICFC
[Setting condition]
When an input capture signal is received
Rev. 4.00 Sep 27, 2006 page 317 of 1130
Section 11 16-Bit Free-Running Timer
REJ09B0327-0400
(Initial value)
(Initial value)
(Initial value)

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